flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
}
- if (is_stencil) {
- flags |= RADEON_SURF_SBUFFER |
- RADEON_SURF_HAS_SBUFFER_MIPTREE;
- }
- }
-
- if (rscreen->chip_class >= SI) {
- flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
+ if (is_stencil)
+ flags |= RADEON_SURF_SBUFFER;
}
if (rscreen->chip_class >= VI &&
fmask.mtilea = rtex->surface.mtilea;
fmask.tile_split = rtex->surface.tile_split;
- if (rscreen->chip_class >= SI) {
- flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
- }
-
switch (nr_samples) {
case 2:
case 4:
#define RADEON_SURF_ZBUFFER (1 << 17)
#define RADEON_SURF_SBUFFER (1 << 18)
#define RADEON_SURF_Z_OR_SBUFFER (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER)
-#define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19)
-#define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20)
+/* bits 19 and 20 are reserved for libdrm_radeon, don't use them */
#define RADEON_SURF_FMASK (1 << 21)
#define RADEON_SURF_DISABLE_DCC (1 << 22)
#define RADEON_SURF_TC_COMPATIBLE_HTILE (1 << 23)
surf_drm->flags = flags;
surf_drm->flags = RADEON_SURF_CLR(surf_drm->flags, TYPE);
surf_drm->flags = RADEON_SURF_CLR(surf_drm->flags, MODE);
- surf_drm->flags |= RADEON_SURF_SET(mode, MODE);
+ surf_drm->flags |= RADEON_SURF_SET(mode, MODE) |
+ RADEON_SURF_HAS_SBUFFER_MIPTREE |
+ RADEON_SURF_HAS_TILE_MODE_INDEX;
switch (tex->target) {
case PIPE_TEXTURE_1D: