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Merge pull request #1036 from YosysHQ/eddie/xilinx_dram
authorEddie Hung <eddie@fpgeh.com>
Thu, 23 May 2019 20:13:10 +0000 (13:13 -0700)
committerGitHub <noreply@github.com>
Thu, 23 May 2019 20:13:10 +0000 (13:13 -0700)
Add "min bits" and "min wports" to xilinx dram rules


Trivial merge