Revert

	2017-11-29  Martin Aberg  <maberg@gaisler.com>

	* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
	to prevent b2bst errata sequence.
	(sqrtdf2_fix): Likewise.

From-SVN: r255439

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b3f5784b1a89e94ace7f2bda8e214a0dc3b4e585..ce17016743c88fc4412a3a7e7294c6ded5ec1f58 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-12-06  Eric Botcazou  <ebotcazou@adacore.com>
+
+       Revert
+       2017-11-29  Martin Aberg  <maberg@gaisler.com>
+
+       * config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
+       to prevent b2bst errata sequence.
+       (sqrtdf2_fix): Likewise.
+
 2017-12-06  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/81945
@@ -556,14 +565,14 @@
 2017-11-29  Daniel Cederman  <cederman@gaisler.com>
 
        * config/sparc/sparc.c (sparc_do_work_around_errata): Treat the
-        movsi_pic_gotdata_op instruction as a load for the UT699 errata
-        workaround.
+       movsi_pic_gotdata_op instruction as a load for the UT699 errata
+       workaround.
 
 2017-11-29  Martin Aberg  <maberg@gaisler.com>
 
        * config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
-        to prevent b2bst errata sequence.
-        (sqrtdf2_fix): Likewise.
+       to prevent b2bst errata sequence.
+       (sqrtdf2_fix): Likewise.
 
 2017-11-29  Daniel Cederman  <cederman@gaisler.com>
 

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 4753c9bde3c4095c59d9ea20b1a0ff3a8a3f1616..d1af68034dd0d47a8e307f07bfae6d742c3a6f75 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -6212,10 +6212,10 @@ visl")
        (div:DF (match_operand:DF 1 "register_operand" "e")
                (match_operand:DF 2 "register_operand" "e")))]
   "TARGET_FPU && sparc_fix_ut699"
-  "fdivd\t%1, %2, %0\n\tnop\n\tstd\t%0, [%%sp-8]\n\tnop"
+  "fdivd\t%1, %2, %0\n\tstd\t%0, [%%sp-8]\n\tnop"
   [(set_attr "type" "fpdivd")
    (set_attr "fptype" "double")
-   (set_attr "length" "4")])
+   (set_attr "length" "3")])
 
 (define_insn "divsf3"
   [(set (match_operand:SF 0 "register_operand" "=f")
@@ -6464,10 +6464,10 @@ visl")
   [(set (match_operand:DF 0 "register_operand" "=e")
        (sqrt:DF (match_operand:DF 1 "register_operand" "e")))]
   "TARGET_FPU && sparc_fix_ut699"
-  "fsqrtd\t%1, %0\n\tnop\n\tstd\t%0, [%%sp-8]\n\tnop"
+  "fsqrtd\t%1, %0\n\tstd\t%0, [%%sp-8]\n\tnop"
   [(set_attr "type" "fpsqrtd")
    (set_attr "fptype" "double")
-   (set_attr "length" "4")])
+   (set_attr "length" "3")])
 
 (define_insn "sqrtsf2"
   [(set (match_operand:SF 0 "register_operand" "=f")