(no commit message)

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index 59e876ab3d328d7da65133499d32ae510283ddd5..ba359a93c321b15a6634bec32308643aa44d13c0 100644 (file)
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -56,15 +56,15 @@
 **Keywords**:
 
 ```
-    FPR, Floating-point, Load-immediate, BF16, FP32
+    FPR, Floating-point, Load-immediate, BF16, bfloat16, FP32
 ```
 
 **Motivation**
 
-Similar to `lxvkq` but extended to a full BF16 with one
+Similar to `lxvkq` but extended to a full bfloat16 with one
 32-bit instruction and a full FP32 in two 32-bit instructions
 these instructions always save a Data Load and associated L1
-and TLB lookup. Even clearing an FPR to zero presently requires Load.
+and TLB lookup. Even quickly clearing an FPR to zero presently requires Load.
 
 **Notes and Observations**: