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added english language description for lhaupx instruction in the pifixedload.mdwm
authorShriya Sharma <shriya@redsemiconductor.com>
Tue, 17 Oct 2023 13:32:29 +0000 (14:32 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 29 Oct 2023 08:54:37 +0000 (08:54 +0000)
openpower/isa/pifixedload.mdwn patch | blob | history

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index 5d4df69ae9aa4725e4a57b4af61094078a342f8a..ddbcdda7cd1aa93ddf1f7e0faf0fadaa164db9df 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -158,6 +158,8 @@ Description:
 
     The sum (RA) + (RB) is placed into register RA.
 
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None