This series of patches are for fixing PR61441.

This series of patches are for fixing PR61441. This patch modifies code to use
REAL_VALUE_ISSIGNALING_NAN instead of REAL_VALUE_ISNAN to avoid the operatins
only for sNaN operands.

Bootstrapped & regression-tested on x86_64-linux-gnu.

gcc/
	* fold-const.c (const_binop): Use REAL_VALUE_ISSIGNALING_NAN instead
	of REAL_VALUE_ISNAN to avoid the operation for sNaN operands.
	* simplify-rtx.c (simplify_const_binary_operation): Same.

From-SVN: r231857

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5baddef391e3e09b6c37e732ca723a0a8732ba83..b7a146961f688c73835d233942fa894b54e0d794 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-12-20  Sujoy Saraswati  <sujoy.saraswati@hpe.com>
+
+       PR tree-optimization/61441
+       * fold-const.c (const_binop): Use REAL_VALUE_ISSIGNALING_NAN instead
+       of REAL_VALUE_ISNAN to avoid the operation for sNaN operands.
+       * simplify-rtx.c (simplify_const_binary_operation): Same.
+
 2015-12-19  Jan Hubicka  <hubicka@ucw.cz>
 
        PR middle-end/65337

diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 553a9c37d7a46318857970828840b1b2d6bed868..fff0285bd13f7e73d66c11ee32b98bb54152e042 100644 (file)
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -1150,9 +1150,10 @@ const_binop (enum tree_code code, tree arg1, tree arg2)
       mode = TYPE_MODE (type);
 
       /* Don't perform operation if we honor signaling NaNs and
-        either operand is a NaN.  */
+        either operand is a signaling NaN.  */
       if (HONOR_SNANS (mode)
-         && (REAL_VALUE_ISNAN (d1) || REAL_VALUE_ISNAN (d2)))
+         && (REAL_VALUE_ISSIGNALING_NAN (d1)
+             || REAL_VALUE_ISSIGNALING_NAN (d2)))
        return NULL_TREE;
 
       /* Don't perform operation if it would raise a division

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 413d61b17590ca465d6af0ed31a2bc4e09bbeab5..225742ec73e7fcf09afa5f3791b579476249e817 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -3892,7 +3892,8 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode,
          real_convert (&f1, mode, CONST_DOUBLE_REAL_VALUE (op1));
 
          if (HONOR_SNANS (mode)
-             && (REAL_VALUE_ISNAN (f0) || REAL_VALUE_ISNAN (f1)))
+             && (REAL_VALUE_ISSIGNALING_NAN (f0)
+                 || REAL_VALUE_ISSIGNALING_NAN (f1)))
            return 0;
 
          if (code == DIV