X86: Fix up the microcode for the FST and FSTP instructions.

--HG--
extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642

diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
index 37574da34e4e457dda9b38540b565bec5df0b6b5..6d56ac3bd41d14d2619ee1d2147de0c72c5b81c3 100644 (file)
--- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
+++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
@@ -66,23 +66,21 @@ def macroop FLD_P {
 };
 
 def macroop FST_M {
-    movfp st(0), ufp1
-    stfp ufp1, seg, sib, disp
+    stfp st(0), seg, sib, disp
 };
 
 def macroop FST_P {
-    movfp st(0), ufp1
     rdip t7
-    stfp ufp1, seg, riprel, disp
+    stfp st(0), seg, riprel, disp
 };
 
 def macroop FSTP_M {
-    movfp st(0), ufp1, spm=1
+    movfp ufp1, st(0), spm=1
     stfp ufp1, seg, sib, disp
 };
 
 def macroop FSTP_P {
-    movfp st(0), ufp1, spm=1
+    movfp ufp1, st(0), spm=1
     rdip t7
     stfp ufp1, seg, riprel, disp
 };