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Reduce multiply to 2 cycles
author
Anton Blanchard
<anton@linux.ibm.com>
Tue, 10 Sep 2019 06:22:58 +0000
(16:22 +1000)
committer
Anton Blanchard
<anton@ozlabs.org>
Wed, 11 Sep 2019 03:23:45 +0000
(13:23 +1000)
We want all non load/store ops to take 2 cycles to make
tracking write back easier.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
multiply.vhdl
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diff --git
a/multiply.vhdl
b/multiply.vhdl
index 4d9637f06b80f1ed85e6d4d2285fa9bb57e0e7b8..9aa43169d9902d30e45a51d4a716ba97ea904c5a 100644
(file)
--- a/
multiply.vhdl
+++ b/
multiply.vhdl
@@
-10,7
+10,7
@@
use work.crhelpers.all;
entity multiply is
generic (
- PIPELINE_DEPTH : natural :=
6
+ PIPELINE_DEPTH : natural :=
2
);
port (
clk : in std_logic;