add truth table generator

diff --git a/migScope/tools/__init__.py b/migScope/tools/__init__.py
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/migScope/tools/truthtable.py b/migScope/tools/truthtable.py
new file mode 100644 (file)
index 0000000..6f09108
--- /dev/null
+++ b/migScope/tools/truthtable.py
@@ -0,0 +1,29 @@
+import os
+import re 
+import sys
+
+def get_operands(s):
+       return sorted(re.findall("[A-z0-9_]+",s))
+
+def gen_truth_table(s):
+       operands = get_operands(s)
+       width = len(operands)
+       stim = []
+       for i in range(width):
+               stim_op = []
+               for j in range(2**width):
+                       stim_op.append((int(j/(2**i)))%2)
+               stim.append(stim_op)
+       
+       truth_table = []
+       for i in range(2**width):
+               for j in range(width):
+                       exec("%s = stim[j][i]" %operands[j])
+               truth_table.append(eval(s))
+       return truth_table
+
+def main():
+       print(gen_truth_table("(A&B&C)|D"))
+
+if __name__ == '__main__':
+  main()

diff --git a/top.py b/top.py
index 57b22cd95c1c7259394667278330a04c8b3de7fa..d731a958cf14af453c2e5667c1fb7f191d7b8f15 100644 (file)
--- a/top.py
+++ b/top.py
@@ -8,6 +8,8 @@ from migen.bus import csr
 import migScope
 import spi2Csr
 
+from migScope.tools.truthtable import *
+
 #
 #Test Term
 #
@@ -91,4 +93,6 @@ print(v)
 #v = verilog.convert(spi2csr0.get_fragment())
 #print(v)
 
+print(gen_truth_table("A&B&C"))
+