#include "pan_blend_shaders.h"
#include "pan_blending.h"
#include "pan_bo.h"
+#include "panfrost-quirks.h"
/* A given Gallium blend state can be encoded to the hardware in numerous,
* dramatically divergent ways due to the interactions of blending with
if (!blend)
return;
- if (screen->require_sfbd) {
+ if (screen->quirks & MIDGARD_SFBD) {
SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_NO_DITHER, !blend->dither);
}
#include "pan_bo.h"
#include "pan_context.h"
#include "pan_format.h"
+#include "panfrost-quirks.h"
#include "util/macros.h"
#include "util/format/u_format.h"
/* Disable the tiler */
t.hierarchy_mask |= MALI_TILER_DISABLED;
- if (screen->require_sfbd) {
+ if (screen->quirks & MIDGARD_SFBD) {
t.hierarchy_mask = 0xFFF; /* TODO: What's this? */
t.polygon_list_size = 0x200;
struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
if (!batch->framebuffer)
- batch->framebuffer = screen->require_sfbd ?
+ batch->framebuffer = (screen->quirks & MIDGARD_SFBD) ?
panfrost_attach_vt_sfbd(batch) :
panfrost_attach_vt_mfbd(batch);
* these earlier chips (perhaps this is a chicken bit of some kind).
* More investigation is needed. */
- if (screen->require_sfbd) {
+ if (screen->quirks & MIDGARD_SFBD)
shader.unknown2_4 |= 0x10;
- }
struct pipe_stencil_state default_stencil = {
.enabled = 0,
ctx->fragment_shader_core.blend.shader = 0;
}
- if (screen->require_sfbd) {
+ if (screen->quirks & MIDGARD_SFBD) {
/* When only a single render target platform is used, the blend
* information is inside the shader meta itself. We
* additionally need to signal CAN_DISCARD for nontrivial blend
ctx->payloads[PIPE_SHADER_FRAGMENT].postfix.shader = transfer.gpu;
- if (!screen->require_sfbd) {
+ if (!(screen->quirks & MIDGARD_SFBD)) {
/* Additional blend descriptor tacked on for jobs using MFBD */
struct midgard_blend_rt rts[4];
#include "pan_context.h"
#include "pan_util.h"
#include "pan_format.h"
+#include "panfrost-quirks.h"
#include "util/format/u_format.h"
{
struct panfrost_screen *screen = pan_screen(batch->ctx->base.screen);
- mali_ptr framebuffer = screen->require_sfbd ?
+ mali_ptr framebuffer = screen->quirks & MIDGARD_SFBD ?
panfrost_sfbd_fragment(batch, has_draws) :
panfrost_mfbd_fragment(batch, has_draws);
#include "util/u_pack_color.h"
#include "pan_util.h"
#include "pandecode/decode.h"
+#include "panfrost-quirks.h"
/* panfrost_bo_access is here to help us keep track of batch accesses to BOs
* and build a proper dependency graph such that batches can be pipelined for
if (batch->tiler_dummy)
return batch->tiler_dummy;
- if (!screen->require_sfbd)
+ if (!(screen->quirks & MIDGARD_NO_HIER_TILING))
create_flags = PAN_BO_INVISIBLE;
batch->tiler_dummy = panfrost_batch_create_bo(batch, 4096,
#include "pan_context.h"
#include "midgard/midgard_compile.h"
+#include "panfrost-quirks.h"
static const struct debug_named_value debug_options[] = {
{"msgs", PAN_DBG_MSGS, "Print debug messages"},
screen->fd = fd;
screen->gpu_id = panfrost_query_gpu_version(screen);
- screen->require_sfbd = screen->gpu_id < 0x0750; /* T760 is the first to support MFBD */
+ screen->quirks = panfrost_get_quirks(screen->gpu_id);
screen->kernel_version = drmGetVersion(fd);
/* Check if we're loading against a supported GPU model. */
break;
default:
/* Fail to load against untested models */
- debug_printf("panfrost: Unsupported model %X",
- screen->gpu_id);
+ debug_printf("panfrost: Unsupported model %X", screen->gpu_id);
return NULL;
}
/* Properties of the GPU in use */
unsigned gpu_id;
- bool require_sfbd;
+ unsigned quirks;
drmVersionPtr kernel_version;
--- /dev/null
+/*
+ * Copyright (C) 2019 Collabora, Ltd.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef __PANFROST_QUIRKS_H
+#define __PANFROST_QUIRKS_H
+
+/* Model-specific quirks requiring workarounds/etc. Quirks may be errata
+ * requiring a workaround, or features. We're trying to be quirk-positive
+ * here; quirky is the best! */
+
+/* Whether the GPU lacks the capability for hierarchical tiling, without an
+ * "Advanced Tiling Unit", instead requiring a single bin size for the entire
+ * framebuffer be selected by the driver */
+
+#define MIDGARD_NO_HIER_TILING (1 << 0)
+
+/* Whether this GPU lacks native multiple render target support and accordingly
+ * needs SFBDs instead, with complex lowering with ES3 */
+
+#define MIDGARD_SFBD (1 << 1)
+
+static inline unsigned
+panfrost_get_quirks(unsigned gpu_id)
+{
+ switch (gpu_id) {
+ case 0x600:
+ case 0x620:
+ return MIDGARD_SFBD;
+
+ case 0x720:
+ return MIDGARD_SFBD | MIDGARD_NO_HIER_TILING;
+
+ case 0x820:
+ case 0x830:
+ return MIDGARD_NO_HIER_TILING;
+
+ case 0x750:
+ case 0x860:
+ case 0x880:
+ return 0;
+
+ default:
+ unreachable("Invalid Midgard GPU ID");
+ }
+}
+
+#endif