"
{
if (TARGET_POWER)
- emit_insn (gen_mulsi3_power (operands[0], operands[1], operands[2]));
+ emit_insn (gen_mulsi3_mq (operands[0], operands[1], operands[2]));
else
- emit_insn (gen_mulsi3_powerpc (operands[0], operands[1], operands[2]));
+ emit_insn (gen_mulsi3_no_mq (operands[0], operands[1], operands[2]));
DONE;
}")
-(define_insn "mulsi3_power"
+(define_insn "mulsi3_mq"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r")
(match_operand:SI 2 "reg_or_short_operand" "r,I")))
{muli|mulli} %0,%1,%2"
[(set_attr "type" "imul")])
-(define_insn "mulsi3_powerpc"
+(define_insn "mulsi3_no_mq"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r")
(match_operand:SI 2 "reg_or_short_operand" "r,I")))]
- "TARGET_POWERPC"
+ "! TARGET_POWER"
"@
mullw %0,%1,%2
mulli %0,%1,%2"