(no commit message)

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 11b3cbd4637534d407d8fe6be9892b32e446643b..6529e9f8d209d19d94d1290ecb011ec740f1c79e 100644 (file)
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -79,9 +79,9 @@ Form: SVL-Form (see [[isatables/fields.text]])
 
 Note that the immediate (`SVi`) spans 7 bits (16 to 22)
 
-`ms` - bit 23 - allows for setting of MVL.  `vs` - bit 24 - allows for
-setting of VL.  `vf` - bit 23 - sets "Vertical First Mode" which is
-stored in `MSR` bit 6 (**TODO: needs approval**)
+* `ms` - bit 23 - allows for setting of MVL.
+* `vs` - bit 24 - allows for setting of VL.
+* `vf` - bit 23 - sets "Vertical First Mode".
 
 Note that in immediate setting mode VL and MVL start from **one**
 i.e. that an immediate value of zero will result in VL/MVL being set to 1.