[testsuite] Enable vect_usad_char effective target for non-SVE aarch64

In GCC 9 the aarch64 port learned how to do V16QImode SAD operations on signed and unsigned chars.
But I had missed enabling the effective target for that.
This patch enables that target for non-SVE aarch64.
Two new tests now PASS on aarch64:
gcc.dg/vect/slp-reduc-sad.c
gcc.dg/vect/vect-reduc-sad.c

	* lib/target-supports.exp (check_effective_target_vect_usad_char):
	Add non-SVE aarch64 to supported list.

From-SVN: r267230

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1ed54f4566d50d96610360bbf95e469989e50bb6..256d9d23e401cdca9b52c5fc1dfcd28bc91e0370 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-12-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * lib/target-supports.exp (check_effective_target_vect_usad_char):
+       Add non-SVE aarch64 to supported list.
+
 2018-12-18  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/88513

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index aade9d438456bee632b68468c958dd16b60d181f..7dec43233e0a2d8efdd0485e5f137e720f178f48 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5925,7 +5925,10 @@ proc check_effective_target_vect_udot_hi { } {
 
 proc check_effective_target_vect_usad_char { } {
     return [check_cached_effective_target_indexed vect_usad_char {
-      expr { [istarget i?86-*-*] || [istarget x86_64-*-*] }}]
+      expr { [istarget i?86-*-*]
+             || [istarget x86_64-*-*]
+             || ([istarget aarch64*-*-*]
+                 && ![check_effective_target_aarch64_sve])}}]
 }
 
 # Return 1 if the target plus current options supports both signed