WIP on priv spec v1.9

diff --git a/benchmarks/common/crt.S b/benchmarks/common/crt.S
index 60486be41dfafcae638f574161861bbeb8c2c487..29c1d4dd1b08f90d617eee74e517daf993fc1a8c 100644 (file)
--- a/benchmarks/common/crt.S
+++ b/benchmarks/common/crt.S
@@ -64,13 +64,13 @@ _start:
   li  x30,0
   li  x31,0
 
-  li t0, MSTATUS_PRV1; csrc mstatus, t0    # run tests in user mode
-  li t0, MSTATUS_IE1;  csrs mstatus, t0    # enable interrupts in user mode
+  li t0, MSTATUS_MPP;  csrc mstatus, t0    # run tests in user mode
+  li t0, MSTATUS_MPIE; csrs mstatus, t0    # enable interrupts in user mode
   li t0, MSTATUS_FS;   csrs mstatus, t0    # enable FPU
   li t0, MSTATUS_XS;   csrs mstatus, t0    # enable accelerator
 
 #ifdef __riscv64
-  csrr t0, mcpuid
+  csrr t0, misa
   # make sure processor supports RV64 if this was compiled for RV64
   bltz t0, 1f
   li a0, 1234

diff --git a/isa/Makefile b/isa/Makefile
index d5b0b76550b73812dbe42ced486b69661123d3ae..d267812071a9dfd31e77fce5167eb1a0621c4489 100644 (file)
--- a/isa/Makefile
+++ b/isa/Makefile
@@ -18,7 +18,7 @@ default: all
 # Build rules
 #--------------------------------------------------------------------
 
-RISCV_PREFIX ?= riscv64-unknown-elf-
+RISCV_PREFIX ?= riscv64-unknown-linux-gnu-
 RISCV_GCC ?= $(RISCV_PREFIX)gcc
 ENTROPY ?= -DENTROPY=$(shell echo $$$$)
 RISCV_GCC_OPTS ?= $(ENTROPY) -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles