# HDL workflow
This section describes the workflow and some best practices for developing
-the Libre-SoC hardware. We use nmigen, yosys and symbiyosys, and this
+the Libre-SOC hardware. We use nmigen, yosys and symbiyosys, and this
page is intended not just to help you get set up, it is intended to
help advise you of some tricks and practices that will help you become
effective team contributors.
-# Libre-SoC Charter Agreement
+# Libre-SOC Charter Agreement
* Draft Status (v0)
* Last Edited: 11 Aug 2019
# AI Acceleration
-As mentioned earlier - it may be time to consider adding AI support in the form of NLP and CNN accelerators to LibreSOC.
+As mentioned earlier - it may be time to consider adding AI support in the form of NLP and CNN accelerators to Libre-SOC.
## List of Ethical concerns related to CNN Accelerators
- training a CNN to discriminate against people you
-# Welcome to LibreSOC
+# Welcome to Libre-SOC
> We're building a chip. A fast chip. A safe chip. A trusted chip.
> Oh and here, have the source code...
-Sounds cool? Learn more about the [why](why_a_libresoc) behind LibreSOC
+Sounds cool? Learn more about the [why](why_a_libresoc) behind Libre-SOC
and [our mission](The_Mission).
# Our Team
5. We do have funding available (see [[nlnet]]) upon completion of issues -
we are also working on procuring more funding which gets the project to
nanometre scale tapeout.
-6. After all this, if you feel that Libre-SoC is a something that
+6. After all this, if you feel that Libre-SOC is a something that
you would like to contribute to, add yourself to the [current_members](about_us)
page, fill in some information about yourself, and join the mailing list
and say hello.
## Needed Skills
Most labor is currently being applied to developing the GPU portion of
-the Libre-SoC.
+the Libre-SOC.
The highest priority needed at the moment is a c++ engineer to work on
a MESA 3D driver. This will begin life similar to SwiftShader however
# Main Pages
-* Libre-SoC [[charter]]
+* Libre-SOC [[charter]]
* [[shakti/m_class]]
* [[alt_rvp]]
* [[3d_gpu]]
# Luke Kenneth Casson Leighton
-Lead dev and Project Coordinator for LibreSOC.
+Lead dev and Project Coordinator for Libre-SOC.
# Status tracking
# Michael Nolan
-Bored college student and contributor to LibreSOC
+Bored college student and contributor to Libre-SOC
# Status Tracking
## Currently working on
* Accepted proposals submit a Project Plan listing a set of milestones, each of which has a fixed budget associated with it (note: not an hourly rate!)
* The Project Plan becomes part of a Memorandum of Understanding, signed by the team (note: not a contract!)
* On 100% completion of tasks *or subtasks* (which must add up ultimately to the total allocated budget) after approval by the project leader, an rfp (Request for Payment) is submitted by email to nlnet.
-* The rfp is paid directly by bank transfer from NLNet *not by the Libre SoC project*
+* The rfp is paid directly by bank transfer from NLNet *not by the Libre-SOC project*
Note that the lack of hourly rate and the lack of contractual obligation is what enables this to be considered charitable donations (and why Corporations may not be paid or involved).
# Management Summary
-The Libre SoC Project core is funded from an initial 2018 proposal. This includes a 3D Driver, called Kazan, and its purpose is to provide a Vulkan compliant hybrid hardware-software API. Given the complex nature of 3D driver development, and because Kazan is a novel approach (written in rust, for security reasons) a second oroposal was submitted to develop a Mesa3D driver (in c++). A second more traditional (c++) 3D Driver allows for increased transparency and collaboration on this ambitious project.
+The Libre-SOC Project core is funded from an initial 2018 proposal. This includes a 3D Driver, called Kazan, and its purpose is to provide a Vulkan compliant hybrid hardware-software API. Given the complex nature of 3D driver development, and because Kazan is a novel approach (written in rust, for security reasons) a second oroposal was submitted to develop a Mesa3D driver (in c++). A second more traditional (c++) 3D Driver allows for increased transparency and collaboration on this ambitious project.
# Tobias Platen
-New contributor to LibreSOC (since 2019)
+New contributor to Libre-SOC (since 2019)
# Status tracking
providing the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
-## LibreSOC is currently targeting:
+## Libre-SOC is currently targeting:
- chromebooks
- smartphones
a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
-## Why a Libre SOC?
+## Why a Libre-SOC?
Its quite hard to guarantee that a performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com).
Given the fact that performant bug-free processors no longer exist, how can you trust your processor? The next best thing is to have access to a processor’s design files. Not only have access to them, you must have the freedom to study and improve them.
-Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire LibreSOC.
+Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire Libre-SOC.
## Benefits: Privacy, Safety-Critical, Peace of Mind...
-Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
+Our Libre-SOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...).
-LibreSOC posits that it is impossible to trust a processor in a safety critical environment without both access
+Libre-SOC posits that it is impossible to trust a processor in a safety critical environment without both access
to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they
expect. An ISA level simulator is no longer satisfactory.
## Still Have Questions?
-Read about the business and practical benefits of a LibreSOC below.
+Read about the business and practical benefits of a Libre-SOC below.
[[why_a_libresoc]]
-## Why a Libre SOC?
+## Why a Libre-SOC?
Its quite hard to guarantee that performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com).
*Collaboration, not competition*.
-Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire LibreSOC.
+Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire Libre-SOC.
## Benefits: Privacy, Safety-Critical, Peace of Mind...
-Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
+Our Libre-SOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...).
-LibreSOC posits that it is impossible to trust a processor in a safety critical environment without both access
+Libre-SOC posits that it is impossible to trust a processor in a safety critical environment without both access
to that processor's source, a cycle accurate HDL simulator that guarantees developers their code behaves as they
expect, and formal correctness proofs. An ISA level simulator is no longer satisfactory.
projects / libreriscv.git / commitdiff