+2019-02-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/89229
+ * config/i386/i386.md (*movoi_internal_avx): Set mode to XI for
+ upper 16 vector registers without TARGET_AVX512VL.
+ (*movti_internal): Likewise.
+
2019-02-08 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/89234
(set_attr "type" "sselog1,sselog1,ssemov,ssemov")
(set_attr "prefix" "vex")
(set (attr "mode")
- (cond [(ior (match_operand 0 "ext_sse_reg_operand")
- (match_operand 1 "ext_sse_reg_operand"))
+ (cond [(and (not (match_test "TARGET_AVX512VL"))
+ (ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand")))
(const_string "XI")
(and (eq_attr "alternative" "1")
(match_test "TARGET_AVX512VL"))
(set (attr "mode")
(cond [(eq_attr "alternative" "0,1")
(const_string "DI")
- (ior (match_operand 0 "ext_sse_reg_operand")
- (match_operand 1 "ext_sse_reg_operand"))
+ (and (not (match_test "TARGET_AVX512VL"))
+ (ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand")))
(const_string "XI")
(and (eq_attr "alternative" "3")
(match_test "TARGET_AVX512VL"))