# This is a 3DNow! instruction, with a prefix, that isn't quite right
# Everything's good bar the opcode suffix
-.byte 0x2e, 0x0f, 0x0f, 0x54, 0xc3, 0x07, 0xc3
+ .insn 0x0f0f, $0xc3, %cs:7(%ebx,%eax,8), %mm2
# Check if objdump works correctly when some bits in instruction
# has non-default value
-# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with null RC
-.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+ vrndscalesd $123, {sae}, %xmm4, %xmm5, %xmm6{%k7} # with null RC
# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
-.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
-.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
+ .insn EVEX.66.0f3a.W1 0x0b, $123, {ru-sae}, %xmm4, %xmm5, %xmm6{%k7}
+
+ vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-11 EVEX.{B,R'}
.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
# vpminud %zmm4, %zmm5, %zmm6{%k7} # with set EVEX.b bit
-.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.b bit
-.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
-# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.b bit - we should get (bad) operand
-.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+ .insn EVEX.66.0F38.W0 0x3b, {rn-sae}, %zmm4, %zmm5, %zmm6{%k7}
+
+ vpmovdb %zmm6, 2032(%edx) # with unset EVEX.b bit
+# vpmovdb %zmm6, 2032(%edx) # with set EVEX.b bit - we should get (bad) operand
+ .insn EVEX.f3.0f38.W0 0x31, %zmm6, 2032(%edx){1to4}
+
# vaddps xmm0, xmm0, xmm3 # with EVEX.z set
.byte 0x62, 0xf1, 0x7c, 0x88, 0x58, 0xc3
+
# vgatherdps (%ecx), %zmm0{%k7} # without SIB / index register
-.byte 0x62, 0xf2, 0x7d, 0x4f, 0x92, 0x01
+ .insn EVEX.66.0F38.W0 0x92, (%ecx), %zmm0{%k7}
# vgatherdps (%bx,%xmm?), %zmm0{%k7} # with 16-bit addressing
-.byte 0x67, 0x62, 0xf2, 0x7d, 0x4f, 0x92, 0x01
+ .insn EVEX.66.0F38.W0 0x92, (%bx,%di), %zmm0{%k7}
# vgatherdps (%eax,%zmm1), %zmm0{%k7}{z} # with set EVEX.z
-.byte 0x62, 0xf2, 0x7d, 0xcf, 0x92, 0x04, 0x08
+ .insn EVEX.66.0F38.W0 0x92, (%eax,%zmm1), %zmm0{%k7}{z}
# vgatherdps (%eax,%zmm1), %zmm0 # without actual mask register
-.byte 0x62, 0xf2, 0x7d, 0x48, 0x92, 0x04, 0x08
+ .insn EVEX.66.0F38.W0 0x92, (%eax,%zmm1), %zmm0
.text
start:
- .byte 0x0f
- .byte 0x22
- .byte 0x1f
- .byte 0x0f
- .byte 0x20
- .byte 0x1f
- .byte 0x0f
- .byte 0x21
- .byte 0x1f
- .byte 0x0f
- .byte 0x23
- .byte 0x1f
+ .code32
+ .insn 0x0f22, (%edi), %cr3
+ .insn 0x0f20, %cr3, (%edi)
+ .insn 0x0f21, %db3, (%edi)
+ .insn 0x0f23, (%edi), %db3
+#as: --divide
#objdump: -drw
#name: opcodes with invalid modrm byte
.text
-.byte 0xFF, 0xEF
-.byte 0xFF, 0xD8
+ .insn 0xFF/5, %edi
+ .insn 0xFF/3, %eax
.fill 0x5, 0x1, 0x90
.byte 0xC5, 0xEC, 0x4A, 0x9B
.byte 0xC5, 0xEC, 0x4A, 0x6F
-.byte 0xC5, 0xEC, 0x4A, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x4a, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x4A, 0x9B
.byte 0xC5, 0xED, 0x4A, 0x6F
-.byte 0xC5, 0xED, 0x4A, 0x3F
+ .insn VEX.L1.66.0f.W0 0x4a, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x4a, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x4A, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x4A, 0x3F
+ .insn VEX.L1.66.0f.W1 0x4a, (%edi), %k2, %k7
.byte 0xC5, 0xEC, 0x41, 0x9B
.byte 0xC5, 0xEC, 0x41, 0x6F
-.byte 0xC5, 0xEC, 0x41, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x41, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x41, 0x9B
.byte 0xC5, 0xED, 0x41, 0x6F
-.byte 0xC5, 0xED, 0x41, 0x3F
+ .insn VEX.L1.66.0f.W0 0x41, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x41, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x41, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x41, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x41, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x41, 0x3F
+ .insn VEX.L1.66.0f.W1 0x41, (%edi), %k2, %k7
.byte 0xC5, 0xEC, 0x42, 0x9B
.byte 0xC5, 0xEC, 0x42, 0x6F
-.byte 0xC5, 0xEC, 0x42, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x42, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x42, 0x9B
.byte 0xC5, 0xED, 0x42, 0x6F
-.byte 0xC5, 0xED, 0x42, 0x3F
+ .insn VEX.L1.66.0f.W0 0x42, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x42, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x42, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x42, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x42, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x42, 0x3F
+ .insn VEX.L1.66.0f.W1 0x42, (%edi), %k2, %k7
.byte 0xC5, 0xEC, 0x4B, 0x9B
.byte 0xC5, 0xEC, 0x4B, 0x6F
-.byte 0xC5, 0xEC, 0x4B, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x4b, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x4B, 0x9B
.byte 0xC5, 0xED, 0x4B, 0x6F
-.byte 0xC5, 0xED, 0x4B, 0x3F
+ .insn VEX.L1.66.0f.W0 0x4b, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x4b, (%edi), %k2, %k7
.byte 0xC5, 0xF8, 0x44, 0x9B
.byte 0xC5, 0xF8, 0x44, 0x6F
-.byte 0xC5, 0xF8, 0x44, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x44, (%edi), %k7
.byte 0xC5, 0xF9, 0x44, 0x9B
.byte 0xC5, 0xF9, 0x44, 0x6F
-.byte 0xC5, 0xF9, 0x44, 0x3F
+ .insn VEX.L0.66.0f.W0 0x44, (%edi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x44, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x44, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x44, (%edi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x44, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x44, 0x3F
+ .insn VEX.L0.66.0f.W1 0x44, (%edi), %k7
.byte 0xC5, 0xEC, 0x45, 0x9B
.byte 0xC5, 0xEC, 0x45, 0x6F
-.byte 0xC5, 0xEC, 0x45, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x45, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x45, 0x9B
.byte 0xC5, 0xED, 0x45, 0x6F
-.byte 0xC5, 0xED, 0x45, 0x3F
+ .insn VEX.L1.66.0f.W0 0x45, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x45, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x45, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x45, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x45, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x45, 0x3F
+ .insn VEX.L1.66.0f.W1 0x45, (%edi), %k2, %k7
.byte 0xC5, 0xF8, 0x98, 0x9B
.byte 0xC5, 0xF8, 0x98, 0x6F
-.byte 0xC5, 0xF8, 0x98, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x98, (%edi), %k7
.byte 0xC5, 0xF9, 0x98, 0x9B
.byte 0xC5, 0xF9, 0x98, 0x6F
-.byte 0xC5, 0xF9, 0x98, 0x3F
+ .insn VEX.L0.66.0f.W0 0x98, (%edi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x98, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x98, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x98, (%edi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x98, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x98, 0x3F
+ .insn VEX.L0.66.0f.W1 0x98, (%edi), %k7
.byte 0xC5, 0xEC, 0x46, 0x9B
.byte 0xC5, 0xEC, 0x46, 0x6F
-.byte 0xC5, 0xEC, 0x46, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x46, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x46, 0x9B
.byte 0xC5, 0xED, 0x46, 0x6F
-.byte 0xC5, 0xED, 0x46, 0x3F
+ .insn VEX.L1.66.0f.W0 0x46, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x46, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x46, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x46, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x46, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x46, 0x3F
+ .insn VEX.L1.66.0f.W1 0x46, (%edi), %k2, %k7
.byte 0xC5, 0xEC, 0x47, 0x9B
.byte 0xC5, 0xEC, 0x47, 0x6F
-.byte 0xC5, 0xEC, 0x47, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x47, (%edi), %k2, %k7
.byte 0xC5, 0xED, 0x47, 0x9B
.byte 0xC5, 0xED, 0x47, 0x6F
-.byte 0xC5, 0xED, 0x47, 0x3F
+ .insn VEX.L1.66.0f.W0 0x47, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x47, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x47, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x47, (%edi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x47, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x47, 0x3F
+ .insn VEX.L1.66.0f.W1 0x47, (%edi), %k2, %k7
.byte 0xC5, 0xF8, 0x99, 0x9B
.byte 0xC5, 0xF8, 0x99, 0x6F
-.byte 0xC5, 0xF8, 0x99, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x99, (%edi), %k7
.byte 0xC5, 0xF9, 0x99, 0x9B
.byte 0xC5, 0xF9, 0x99, 0x6F
-.byte 0xC5, 0xF9, 0x99, 0x3F
+ .insn VEX.L0.66.0f.W0 0x99, (%edi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x99, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x99, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x99, (%edi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x99, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x99, 0x3F
+ .insn VEX.L0.66.0f.W1 0x99, (%edi), %k7
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x8F, 0x01
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x6A, 0x01
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x04, 0x01
.byte 0xC4, 0xE3, 0x79, 0x33, 0x04, 0x01
.byte 0xC5, 0xF8, 0x92, 0x9B
.byte 0xC5, 0xF8, 0x92, 0x6F
-.byte 0xC5, 0xF8, 0x92, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x92, (%edi), %k7
.byte 0xC5, 0xF9, 0x92, 0x9B
.byte 0xC5, 0xF9, 0x92, 0x6F
-.byte 0xC5, 0xF9, 0x92, 0x3F
+ .insn VEX.L0.66.0f.W0 0x92, (%edi), %k7
.byte 0xC5, 0xFB, 0x92, 0x9B
.byte 0xC5, 0xFB, 0x92, 0x6F
-.byte 0xC5, 0xFB, 0x92, 0x3F
+ .insn VEX.L0.f2.0f.W0 0x92, (%edi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x92, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x92, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x92, 0x3F
+ .insn VEX.L0.66.0f.W1 0x92, (%edi), %k7
.byte 0xC5, 0xF8, 0x93, 0x9B
.byte 0xC5, 0xF8, 0x93, 0x6F
-.byte 0xC5, 0xF8, 0x93, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x93, (%edi), %k7
.byte 0xC5, 0xF9, 0x93, 0x9B
.byte 0xC5, 0xF9, 0x93, 0x6F
-.byte 0xC5, 0xF9, 0x93, 0x3F
+ .insn VEX.L0.66.0f.W0 0x93, (%edi), %k7
.byte 0xC5, 0xFB, 0x93, 0x9B
.byte 0xC5, 0xFB, 0x93, 0x6F
-.byte 0xC5, 0xFB, 0x93, 0x3F
+ .insn VEX.L0.f2.0f.W0 0x93, (%edi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x93, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x93, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
+ .insn VEX.L0.66.0f.W1 0x93, (%edi), %k7
.byte 0xc4, 0xe2, 0x1, 0x1c, 0x41, 0x37
.byte 0x62, 0xf2, 0xad, 0x08, 0x1c, 0x01
.byte 0x1
-.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
+ .insn EVEX.66.0f3a.W0 0x1b, $0x25, %ymm0, %xmm1
.byte 0x62, 0xf3
-.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+//.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+ .insn EVEX.66.0f3a.W0 0x23, $0x25, %xmm2, %xmm1, %xmm0
.byte 0x62
-.byte 0x62, 0xf2, 0x7d, 0x28, 0x5b, 0x41, 0x37
+ .insn EVEX.66.0f38.W0 0x5b, 0x37(%ecx){:d1}, %ymm0
.allow_index_reg
.text
_start:
- .byte 0x62, 0xf1, 0xd6, 0x38, 0x2a, 0xf0
- .byte 0x62, 0xf1, 0x57, 0x38, 0x2a, 0xf0
- .byte 0x62, 0xf1, 0xd7, 0x38, 0x2a, 0xf0
- .byte 0x62, 0xf1, 0xd6, 0x08, 0x7b, 0xf0
- .byte 0x62, 0xf1, 0x57, 0x08, 0x7b, 0xf0
- .byte 0x62, 0xf1, 0xd7, 0x08, 0x7b, 0xf0
- .byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
- .byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
- .byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
+ .insn EVEX.LIG.F3.0F.W1 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W0 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W1 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+ .insn EVEX.LIG.F3.0F.W1 0x7b, %eax,%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W0 0x7b, %eax,%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W1 0x7b, %eax,%xmm5,%xmm6
+ .insn EVEX.LIG.F3.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W0 0x7b, %eax,{rd-sae},%xmm5,%xmm6
+ .insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
-#as: --32
+#as: --32 --divide
#objdump: -dw
#name: i386 fpu bad opcodes
.text
start:
- .byte 0xdd
- .byte 0xf0
+ .insn 0xdd/6, %st(0)
#source: ../x86-64-nops.s
+#as: --divide
#objdump: -drw
#name: x86-64 (ILP32) nops
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
-[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
-[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
-[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 cs nopw 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 0f 19 ff nop %edi
-[ ]*[a-f0-9]+: 0f 1a ff nop %edi
-[ ]*[a-f0-9]+: 0f 1b ff nop %edi
-[ ]*[a-f0-9]+: 0f 1c ff nop %edi
-[ ]*[a-f0-9]+: 0f 1d ff nop %edi
-[ ]*[a-f0-9]+: 0f 1e ff nop %edi
-[ ]*[a-f0-9]+: 0f 1f ff nop %edi
-[ ]*[a-f0-9]+: 0f 19 5a 22 nopl 0x22\(%rdx\)
-[ ]*[a-f0-9]+: 0f 1c 5a 22 nopl 0x22\(%rdx\)
-[ ]*[a-f0-9]+: 0f 1d 5a 22 nopl 0x22\(%rdx\)
-[ ]*[a-f0-9]+: 0f 1e 5a 22 nopl 0x22\(%rdx\)
-[ ]*[a-f0-9]+: 0f 1f 5a 22 nopl 0x22\(%rdx\)
-[ ]*[a-f0-9]+: 0f 19 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
-[ ]*[a-f0-9]+: 0f 1c 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
-[ ]*[a-f0-9]+: 0f 1d 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
-[ ]*[a-f0-9]+: 0f 1e 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
-[ ]*[a-f0-9]+: 0f 1f 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
-[ ]*[a-f0-9]+: 0f 19 04 60 nopl \(%rax,%riz,2\)
-[ ]*[a-f0-9]+: 0f 1c 0c 60 nopl \(%rax,%riz,2\)
-[ ]*[a-f0-9]+: 0f 1d 04 60 nopl \(%rax,%riz,2\)
-[ ]*[a-f0-9]+: 0f 1e 04 60 nopl \(%rax,%riz,2\)
-[ ]*[a-f0-9]+: 0f 1f 04 60 nopl \(%rax,%riz,2\)
-[ ]*[a-f0-9]+: 0f 19 04 59 nopl \(%rcx,%rbx,2\)
-[ ]*[a-f0-9]+: 0f 1c 0c 59 nopl \(%rcx,%rbx,2\)
-[ ]*[a-f0-9]+: 0f 1d 04 59 nopl \(%rcx,%rbx,2\)
-[ ]*[a-f0-9]+: 0f 1e 04 59 nopl \(%rcx,%rbx,2\)
-[ ]*[a-f0-9]+: 0f 1f 04 59 nopl \(%rcx,%rbx,2\)
-[ ]*[a-f0-9]+: 48 0f 1f c0 nop %rax
-[ ]*[a-f0-9]+: 0f 1f c0 nop %eax
-[ ]*[a-f0-9]+: 66 0f 1f c0 nop %ax
-[ ]*[a-f0-9]+: 48 0f 1f 00 nopq \(%rax\)
-[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
-[ ]*[a-f0-9]+: 66 0f 1f 00 nopw \(%rax\)
-[ ]*[a-f0-9]+: 48 0f 1f c0 nop %rax
-[ ]*[a-f0-9]+: 0f 1f c0 nop %eax
-[ ]*[a-f0-9]+: 66 0f 1f c0 nop %ax
-[ ]*[a-f0-9]+: 49 0f 1f c2 nop %r10
-[ ]*[a-f0-9]+: 41 0f 1f c2 nop %r10d
-[ ]*[a-f0-9]+: 66 41 0f 1f c2 nop %r10w
-[ ]*[a-f0-9]+: 49 0f 1f 02 nopq \(%r10\)
-[ ]*[a-f0-9]+: 41 0f 1f 02 nopl \(%r10\)
-[ ]*[a-f0-9]+: 66 41 0f 1f 02 nopw \(%r10\)
-[ ]*[a-f0-9]+: 49 0f 1f c2 nop %r10
-[ ]*[a-f0-9]+: 41 0f 1f c2 nop %r10d
-[ ]*[a-f0-9]+: 66 41 0f 1f c2 nop %r10w
-#pass
+#dump: ../x86-64-nops.d
+#as: --divide
#objdump: -dw
#name: i386 katmai
prefetcht2 (%ecx)
# A bad sfence modrm byte
-.byte 0x65,0x0F,0xAE,0xff
+ .insn gs 0x0FAE/7, %edi
# Pad out to good alignment
.p2align 4,0
foo: bnd ret
+ .att_syntax prefix
bad:
# bndldx (%eax),(bad)
- .byte 0x0f
- .byte 0x1a
- .byte 0x30
+ .insn 0x0f1a, (%eax), %esi
# bndmov (bad),%bnd0
- .byte 0x66
- .byte 0x0f
- .byte 0x1a
- .byte 0xc4
+ .insn 0x660f1a, %k4, %bnd0
+#as: --divide
#objdump: -drw
#name: i386 nops
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
-[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 2e 66 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 0f 19 ff nop %edi
[ ]*[a-f0-9]+: 0f 1a ff nop %edi
[ ]*[a-f0-9]+: 0f 1b ff nop %edi
.text
- .byte 0x0f, 0x1f, 0x0
- .byte 0x0f, 0x1f, 0x40, 0x0
- .byte 0x0f, 0x1f, 0x44, 0x0, 0x0
- .byte 0x66, 0x0f, 0x1f, 0x44, 0x0, 0x0
- .byte 0x0f, 0x1f, 0x80, 0x0, 0x0, 0x0, 0x0
- .byte 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
- .byte 0x66, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
- .byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .insn 0x0f1f/0, (%eax)
+ .insn {disp8} 0x0f1f/0, 0(%eax)
+ .insn {disp8} 0x0f1f/0, 0(%eax,%eax)
+ .insn {disp8} data16 0x0f1f/0, 0(%eax,%eax)
+ .insn {disp32} 0x0f1f/0, 0(%eax)
+ .insn {disp32} 0x0f1f/0, 0(%eax,%eax)
+ .insn {disp32} data16 0x0f1f/0, 0(%eax,%eax)
+ .insn {disp32} data16 0x0f1f/0, %cs:0(%eax,%eax)
# reg,reg
- .byte 0x0f, 0x19, 0xff
- .byte 0x0f, 0x1a, 0xff
- .byte 0x0f, 0x1b, 0xff
- .byte 0x0f, 0x1c, 0xff
- .byte 0x0f, 0x1d, 0xff
- .byte 0x0f, 0x1e, 0xff
- .byte 0x0f, 0x1f, 0xff
+ .insn 0x0f19, %edi, %edi
+ .insn 0x0f1a, %edi, %edi
+ .insn 0x0f1b, %edi, %edi
+ .insn 0x0f1c, %edi, %edi
+ .insn 0x0f1d, %edi, %edi
+ .insn 0x0f1e, %edi, %edi
+ .insn 0x0f1f, %edi, %edi
# with base and imm8
- .byte 0x0f, 0x19, 0x5A, 0x22
- .byte 0x0f, 0x1c, 0x5A, 0x22
- .byte 0x0f, 0x1d, 0x5A, 0x22
- .byte 0x0f, 0x1e, 0x5A, 0x22
- .byte 0x0f, 0x1f, 0x5A, 0x22
+ .insn 0x0f19/3, 0x22(%edx)
+ .insn 0x0f1c/3, 0x22(%edx)
+ .insn 0x0f1d/3, 0x22(%edx)
+ .insn 0x0f1e/3, 0x22(%edx)
+ .insn 0x0f1f/3, 0x22(%edx)
# with sib and imm32
- .byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
+ .insn 0x0f19/3, 0x44332211(%ebp,%ebx)
+ .insn 0x0f1c/3, 0x44332211(%ebp,%ebx)
+ .insn 0x0f1d/3, 0x44332211(%ebp,%ebx)
+ .insn 0x0f1e/3, 0x44332211(%ebp,%ebx)
+ .insn 0x0f1f/3, 0x44332211(%ebp,%ebx)
- .byte 0x0f, 0x19, 0x04, 0x60
- .byte 0x0f, 0x1c, 0x0c, 0x60
- .byte 0x0f, 0x1d, 0x04, 0x60
- .byte 0x0f, 0x1e, 0x04, 0x60
- .byte 0x0f, 0x1f, 0x04, 0x60
+ .allow_index_reg
+ .insn 0x0f19/0, (%eax,%eiz,2)
+ .insn 0x0f1c/1, (%eax,%eiz,2)
+ .insn 0x0f1d/0, (%eax,%eiz,2)
+ .insn 0x0f1e/0, (%eax,%eiz,2)
+ .insn 0x0f1f/0, (%eax,%eiz,2)
- .byte 0x0f, 0x19, 0x04, 0x59
- .byte 0x0f, 0x1c, 0x0c, 0x59
- .byte 0x0f, 0x1d, 0x04, 0x59
- .byte 0x0f, 0x1e, 0x04, 0x59
- .byte 0x0f, 0x1f, 0x04, 0x59
+ .insn 0x0f19/0, (%ecx,%ebx,2)
+ .insn 0x0f1c/1, (%ecx,%ebx,2)
+ .insn 0x0f1d/0, (%ecx,%ebx,2)
+ .insn 0x0f1e/0, (%ecx,%ebx,2)
+ .insn 0x0f1f/0, (%ecx,%ebx,2)
nop %eax
nop %ax
#source: opcode.s
-#as: -J
+#as: -J --divide
#objdump: -dwMintel
#name: i386 opcodes (Intel disassembly)
[ ]*[a-f0-9]+: df 38 fistp QWORD PTR \[eax\]
[ ]*[a-f0-9]+: df 38 fistp QWORD PTR \[eax\]
+[a-f0-9]+: 82 c3 01 add bl,0x1
- +[a-f0-9]+: 82 f3 01 xor bl,0x1
+ +[a-f0-9]+: 82 cb 01 or bl,0x1
+[a-f0-9]+: 82 d3 01 adc bl,0x1
+[a-f0-9]+: 82 db 01 sbb bl,0x1
+[a-f0-9]+: 82 e3 01 and bl,0x1
#source: opcode.s
-#as: -J
+#as: -J --divide
#objdump: -dwMsuffix
#name: i386 opcodes (w/ suffix)
[ ]*[a-f0-9]+: df 38 fistpll \(%eax\)
[ ]*[a-f0-9]+: df 38 fistpll \(%eax\)
+[a-f0-9]+: 82 c3 01 addb \$0x1,%bl
- +[a-f0-9]+: 82 f3 01 xorb \$0x1,%bl
+ +[a-f0-9]+: 82 cb 01 orb \$0x1,%bl
+[a-f0-9]+: 82 d3 01 adcb \$0x1,%bl
+[a-f0-9]+: 82 db 01 sbbb \$0x1,%bl
+[a-f0-9]+: 82 e3 01 andb \$0x1,%bl
-#as: -J
+#as: -J --divide
#objdump: -dw
#name: i386 opcodes
[ ]*[a-f0-9]+: df 38 fistpll \(%eax\)
[ ]*[a-f0-9]+: df 38 fistpll \(%eax\)
+[a-f0-9]+: 82 c3 01 add \$0x1,%bl
- +[a-f0-9]+: 82 f3 01 xor \$0x1,%bl
+ +[a-f0-9]+: 82 cb 01 or \$0x1,%bl
+[a-f0-9]+: 82 d3 01 adc \$0x1,%bl
+[a-f0-9]+: 82 db 01 sbb \$0x1,%bl
+[a-f0-9]+: 82 e3 01 and \$0x1,%bl
fistpq (%eax)
fistpll (%eax)
- .byte 0x82, 0xc3, 0x01
- .byte 0x82, 0xf3, 0x01
- .byte 0x82, 0xd3, 0x01
- .byte 0x82, 0xdb, 0x01
- .byte 0x82, 0xe3, 0x01
- .byte 0x82, 0xeb, 0x01
- .byte 0x82, 0xf3, 0x01
- .byte 0x82, 0xfb, 0x01
+ .insn 0x82/0, $1, %bl
+ .insn 0x82/1, $1, %bl
+ .insn 0x82/2, $1, %bl
+ .insn 0x82/3, $1, %bl
+ .insn 0x82/4, $1, %bl
+ .insn 0x82/5, $1, %bl
+ .insn 0x82/6, $1, %bl
+ .insn 0x82/7, $1, %bl
{evex} {store} vpextrw $0xab, %xmm5, %eax
- .byte 0xf6, 0xc9, 0x01
- .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
- .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
- .byte 0xc0, 0xf0, 0x02
- .byte 0xc1, 0xf0, 0x01
- .byte 0xd0, 0xf0
- .byte 0xd1, 0xf0
- .byte 0xd2, 0xf0
- .byte 0xd3, 0xf0
+ .insn 0xf6/1, $1, %cl
+ .insn 0xf7/1, $2{:u16}, %cx
+ .insn 0xf7/1, $4{:u32}, %ecx
+ .insn 0xc0/6, $2, %al
+ .insn 0xc1/6, $1, %eax
+ .insn 0xd0/6, %al
+ .insn 0xd1/6, %eax
+ .insn 0xd2/6, %al
+ .insn 0xd3/6, %eax
.text
pr29483:
- .byte 0x65,0x62,0x62,0x7d,0x97,0xa0,0x94,0xff,0x20,0x20,0x20,0xae
+ .insn EVEX.128.66.0f38.W0 0xa0, %gs:-0x51dfdfe0(%rdi,%xmm23,8){1to4}, %xmm26{%k7}{z}
+#as: --divide
#objdump: -dw -Mintel
#name: i386 prefetch (Intel disassembly)
#source: prefetch.s
+#as: --divide
#objdump: -dw
#name: i386 prefetch
+ .code32
+
.macro try opcode:vararg
- .byte \opcode, 0x00
- .byte \opcode, 0x08
- .byte \opcode, 0x10
- .byte \opcode, 0x18
- .byte \opcode, 0x20
- .byte \opcode, 0x28
- .byte \opcode, 0x30
- .byte \opcode, 0x38
+ .insn 0x0f\opcode/0, (%eax)
+ .insn 0x0f\opcode/1, (%eax)
+ .insn 0x0f\opcode/2, (%eax)
+ .insn 0x0f\opcode/3, (%eax)
+ .insn 0x0f\opcode/4, (%eax)
+ .insn 0x0f\opcode/5, (%eax)
+ .insn 0x0f\opcode/6, (%eax)
+ .insn 0x0f\opcode/7, (%eax)
.endm
.text
amd_prefetch:
- try 0x0f, 0x0d
+ try 0d
intel_prefetch:
- try 0x0f, 0x18
+ try 18
int $3
# "repz" vmovaps %xmm7, %xmm7
- .byte 0xc5
- .byte 0xfa
- .byte 0x28
- .byte 0xff
+ .insn VEX.128.f3.0f.W0 0x28, %xmm7, %xmm7
int $3
# "repnz" {vex3} vmovaps %xmm7, %xmm7
- .byte 0xc4
- .byte 0xe1
- .byte 0x7b
- .byte 0x28
- .byte 0xff
+ .insn {vex3} VEX.128.f2.0f.W0 0x28, %xmm7, %xmm7
int $3
# "EVEX.W1" vmovaps %xmm7, %xmm7
- .byte 0x62
- .byte 0xf1
- .byte 0xfc
- .byte 0x08
- .byte 0x28
- .byte 0xff
+ .insn EVEX.128.0f.W1 0x28, %xmm7, %xmm7
int $3
# "repz" vmovaps %xmm7, %xmm7
- .byte 0x62
- .byte 0xf1
- .byte 0x7e
- .byte 0x08
- .byte 0x28
- .byte 0xff
+ .insn EVEX.128.f3.0f.W0 0x28, %xmm7, %xmm7
int $3
# "EVEX.W0" vmovapd %xmm7, %xmm7
- .byte 0x62
- .byte 0xf1
- .byte 0x7d
- .byte 0x08
- .byte 0x28
- .byte 0xff
+ .insn EVEX.128.66.0f.W0 0x28, %xmm7, %xmm7
int $3
# "repnz" vmovapd %xmm7, %xmm7
- .byte 0x62
- .byte 0xf1
- .byte 0xff
- .byte 0x08
- .byte 0x28
- .byte 0xff
+ .insn EVEX.128.f2.0f.W1 0x28, %xmm7, %xmm7
int $3
.text
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0xd2
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.128.F3.0F38.W1 0x5c, %tmm4, %tmm5, %tmm3
.fill 0x05, 0x01, 0x90
+
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0x56
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.256.F3.0F38.W0 0x5c, %tmm4, %tmm5, %tmm3
.fill 0x05, 0x01, 0x90
+
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
- .byte 0xc4
- .byte 0x62
- .byte 0x52
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.128.F3.0F38.W0 0x5c, %xmm4, %xmm5, %xmm11
+
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
- .byte 0xc4
- .byte 0xc2
- .byte 0x52
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.128.F3.0F38.W0 0x5c, %xmm12, %xmm5, %xmm3
+
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0x32
- .byte 0x5c
- .byte 0xdc
- #tileloadd (%rax),%tmm1 set R/M= 001 (illegal value) without SIB.
- .byte 0xc4
- .byte 0xe2
- .byte 0x7b
- .byte 0x4b
- .byte 0x09
+ .insn VEX.128.F3.0F38.W0 0x5c, %xmm4, %xmm9, %xmm3
+
+ #tileloadd (%rcx),%tmm1 set R/M= 001 (illegal value) without SIB.
+ .insn VEX.128.F2.0F38.W0 0x4b, (%rcx), %xmm1
+
#tdpbuud %tmm1,%tmm1,%tmm1 All 3 TMM registers can't be identical.
- .byte 0xc4
- .byte 0xe2
- .byte 0x70
- .byte 0x5e
- .byte 0xc9
+ .insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm1, %tmm1
+
#tdpbuud %tmm0,%tmm1,%tmm1 All 3 TMM registers can't be identical.
- .byte 0xc4
- .byte 0xe2
- .byte 0x78
- .byte 0x5e
- .byte 0xc9
+ .insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm0, %tmm1
+
#tdpbuud %tmm1,%tmm0,%tmm1 All 3 TMM registers can't be identical.
- .byte 0xc4
- .byte 0xe2
- .byte 0x70
- .byte 0x5e
- .byte 0xc8
+ .insn VEX.128.NP.0F38.W0 0x5e, %tmm0, %tmm1, %tmm1
+
#tdpbuud %tmm1,%tmm1,%tmm0 All 3 TMM registers can't be identical.
- .byte 0xc4
- .byte 0xe2
- .byte 0x70
- .byte 0x5e
- .byte 0xc1
+ .insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm1, %tmm0
.text
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0xd3
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.128.F2.0F38.W1 0x5c, %tmm4, %tmm5, %tmm3
.fill 0x05, 0x01, 0x90
+
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0x57
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.256.F2.0F38.W0 0x5c, %tmm4, %tmm5, %tmm3
.fill 0x05, 0x01, 0x90
+
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
- .byte 0xc4
- .byte 0x62
- .byte 0x53
- .byte 0x5c
- .byte 0xdc
- #tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
- .byte 0xc4
- .byte 0xc2
- .byte 0x53
- .byte 0x5c
- .byte 0xdc
- #tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
- .byte 0xc4
- .byte 0xe2
- .byte 0x33
- .byte 0x5c
- .byte 0xdc
+ .insn VEX.128.F2.0F38.W0 0x5c, %xmm4, %xmm5, %xmm11
+
+ #tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
+ .insn VEX.128.F2.0F38.W0 0x5c, %xmm12, %xmm5, %xmm3
+
+ #tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
+ .insn VEX.128.F2.0F38.W0 0x5c, %xmm4, %xmm9, %xmm3
.text
#vfcmaddcph %zmm30, %zmm29, %zmm30 dest and src registers must be distinct.
- .byte 0x62
- .byte 0x06
- .byte 0x17
- .byte 0x40
- .byte 0x56
- .byte 0xf6
+ .insn EVEX.f2.M6.W0 0x56, %zmm30, %zmm29, %zmm30
+
#vfcmaddcph (%rcx), %zmm3, %zmm3 dest and src registers must be distinct.
- .byte 0x62
- .byte 0xf6
- .byte 0x67
- .byte 0x48
- .byte 0x56
- .byte 0x19
+ .insn EVEX.f2.M6.W0 0x56, (%rcx), %zmm3, %zmm3
+
#vfcmaddcph %xmm3, %xmm2, %xmm2 dest and src registers must be distinct.
- .byte 0x62
- .byte 0xf6
- .byte 0x6f
- .byte 0x08
- .byte 0x56
- .byte 0xd3
+ .insn EVEX.f2.M6.W0 0x56, %xmm3, %xmm2, %xmm2
+
#vfcmaddcsh %xmm3, %xmm2, %xmm3 dest and src registers must be distinct.
- .byte 0x62
- .byte 0xf6
- .byte 0x6f
- .byte 0x08
- .byte 0x57
- .byte 0xdb
+ .insn EVEX.LIG.f2.M6.W0 0x57, %xmm3, %xmm2, %xmm3
+
#vfcmaddcsh %xmm3, %xmm2, %xmm2 dest and src registers must be distinct.
- .byte 0x62
- .byte 0xf6
- .byte 0x6f
- .byte 0x08
- .byte 0x57
- .byte 0xd3
+ .insn EVEX.LIG.f2.M6.W0 0x57, %xmm3, %xmm2, %xmm2
# Check if objdump works correctly when some bits in instruction
# has non-default value
-# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with null RC
-.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+ vrndscalesd $123, {sae}, %xmm4, %xmm5, %xmm6{%k7} # with null RC
# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
-.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
-.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-11 EVEX.{B,R'}
-.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
+ .insn EVEX.66.0f3a.W1 0x0b, $123, {ru-sae}, %xmm4, %xmm5, %xmm6{%k7}
+
+ vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
+ vpminud %zmm12, %zmm5, %zmm22{%k7} # with not-11 EVEX.{B,R'}
# vpminud %zmm4, %zmm5, %zmm6{%k7} # with set EVEX.b bit
-.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.b bit
-.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
+ .insn EVEX.66.0F38.W0 0x3b, {rn-sae}, %zmm4, %zmm5, %zmm6{%k7}
+
+ vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.b bit
# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.b bit - we should get (bad) operand
-.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+ .insn EVEX.f3.0f38.W0 0x31, %zmm6, 2032(%rdx){1to4}
+#as: --divide
#objdump: -drw
#name: x86-64 opcodes with invalid modrm byte
.text
-.byte 0xFF, 0xEF
-.byte 0xFF, 0xD8
+ .insn 0xFF/5, %edi
+ .insn 0xFF/3, %eax
.fill 0x5, 0x1, 0x90
.byte 0xC5, 0xEC, 0x4A, 0x9B
.byte 0xC5, 0xEC, 0x4A, 0x6F
-.byte 0xC5, 0xEC, 0x4A, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x4a, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x4A, 0x9B
.byte 0xC5, 0xED, 0x4A, 0x6F
-.byte 0xC5, 0xED, 0x4A, 0x3F
+ .insn VEX.L1.66.0f.W0 0x4a, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x4a, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x4A, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x4A, 0x3F
+ .insn VEX.L1.66.0f.W1 0x4a, (%rdi), %k2, %k7
.byte 0xC5, 0xEC, 0x41, 0x9B
.byte 0xC5, 0xEC, 0x41, 0x6F
-.byte 0xC5, 0xEC, 0x41, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x41, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x41, 0x9B
.byte 0xC5, 0xED, 0x41, 0x6F
-.byte 0xC5, 0xED, 0x41, 0x3F
+ .insn VEX.L1.66.0f.W0 0x41, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x41, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x41, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x41, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x41, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x41, 0x3F
+ .insn VEX.L1.66.0f.W1 0x41, (%rdi), %k2, %k7
.byte 0xC5, 0xEC, 0x42, 0x9B
.byte 0xC5, 0xEC, 0x42, 0x6F
-.byte 0xC5, 0xEC, 0x42, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x42, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x42, 0x9B
.byte 0xC5, 0xED, 0x42, 0x6F
-.byte 0xC5, 0xED, 0x42, 0x3F
+ .insn VEX.L1.66.0f.W0 0x42, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x42, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x42, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x42, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x42, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x42, 0x3F
+ .insn VEX.L1.66.0f.W1 0x42, (%rdi), %k2, %k7
.byte 0xC5, 0xEC, 0x4B, 0x9B
.byte 0xC5, 0xEC, 0x4B, 0x6F
-.byte 0xC5, 0xEC, 0x4B, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x4b, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x4B, 0x9B
.byte 0xC5, 0xED, 0x4B, 0x6F
-.byte 0xC5, 0xED, 0x4B, 0x3F
+ .insn VEX.L1.66.0f.W0 0x4b, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x4b, (%rdi), %k2, %k7
.byte 0xC5, 0xF8, 0x44, 0x9B
.byte 0xC5, 0xF8, 0x44, 0x6F
-.byte 0xC5, 0xF8, 0x44, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x44, (%rdi), %k7
.byte 0xC5, 0xF9, 0x44, 0x9B
.byte 0xC5, 0xF9, 0x44, 0x6F
-.byte 0xC5, 0xF9, 0x44, 0x3F
+ .insn VEX.L0.66.0f.W0 0x44, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x44, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x44, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x44, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x44, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x44, 0x3F
+ .insn VEX.L0.66.0f.W1 0x44, (%rdi), %k7
.byte 0xC5, 0xEC, 0x45, 0x9B
.byte 0xC5, 0xEC, 0x45, 0x6F
-.byte 0xC5, 0xEC, 0x45, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x45, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x45, 0x9B
.byte 0xC5, 0xED, 0x45, 0x6F
-.byte 0xC5, 0xED, 0x45, 0x3F
+ .insn VEX.L1.66.0f.W0 0x45, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x45, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x45, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x45, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x45, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x45, 0x3F
+ .insn VEX.L1.66.0f.W1 0x45, (%rdi), %k2, %k7
.byte 0xC5, 0xF8, 0x98, 0x9B
.byte 0xC5, 0xF8, 0x98, 0x6F
-.byte 0xC5, 0xF8, 0x98, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x98, (%rdi), %k7
.byte 0xC5, 0xF9, 0x98, 0x9B
.byte 0xC5, 0xF9, 0x98, 0x6F
-.byte 0xC5, 0xF9, 0x98, 0x3F
+ .insn VEX.L0.66.0f.W0 0x98, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x98, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x98, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x98, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x98, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x98, 0x3F
+ .insn VEX.L0.66.0f.W1 0x98, (%rdi), %k7
.byte 0xC5, 0xEC, 0x46, 0x9B
.byte 0xC5, 0xEC, 0x46, 0x6F
-.byte 0xC5, 0xEC, 0x46, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x46, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x46, 0x9B
.byte 0xC5, 0xED, 0x46, 0x6F
-.byte 0xC5, 0xED, 0x46, 0x3F
+ .insn VEX.L1.66.0f.W0 0x46, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x46, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x46, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x46, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x46, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x46, 0x3F
+ .insn VEX.L1.66.0f.W1 0x46, (%rdi), %k2, %k7
.byte 0xC5, 0xEC, 0x47, 0x9B
.byte 0xC5, 0xEC, 0x47, 0x6F
-.byte 0xC5, 0xEC, 0x47, 0x3F
+ .insn VEX.L1.NP.0f.W0 0x47, (%rdi), %k2, %k7
.byte 0xC5, 0xED, 0x47, 0x9B
.byte 0xC5, 0xED, 0x47, 0x6F
-.byte 0xC5, 0xED, 0x47, 0x3F
+ .insn VEX.L1.66.0f.W0 0x47, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xEC, 0x47, 0x9B
.byte 0xC4, 0xE1, 0xEC, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x47, 0x3F
+ .insn VEX.L1.NP.0f.W1 0x47, (%rdi), %k2, %k7
.byte 0xC4, 0xE1, 0xED, 0x47, 0x9B
.byte 0xC4, 0xE1, 0xED, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x47, 0x3F
+ .insn VEX.L1.66.0f.W1 0x47, (%rdi), %k2, %k7
.byte 0xC5, 0xF8, 0x99, 0x9B
.byte 0xC5, 0xF8, 0x99, 0x6F
-.byte 0xC5, 0xF8, 0x99, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x99, (%rdi), %k7
.byte 0xC5, 0xF9, 0x99, 0x9B
.byte 0xC5, 0xF9, 0x99, 0x6F
-.byte 0xC5, 0xF9, 0x99, 0x3F
+ .insn VEX.L0.66.0f.W0 0x99, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF8, 0x99, 0x9B
.byte 0xC4, 0xE1, 0xF8, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x99, 0x3F
+ .insn VEX.L0.NP.0f.W1 0x99, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x99, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x99, 0x3F
+ .insn VEX.L0.66.0f.W1 0x99, (%rdi), %k7
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x8F, 0x01
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x6A, 0x01
.byte 0xC4, 0xE3, 0xF9, 0x30, 0x04, 0x01
.byte 0xC4, 0xE3, 0x79, 0x33, 0x04, 0x01
.byte 0xC5, 0xF8, 0x92, 0x9B
.byte 0xC5, 0xF8, 0x92, 0x6F
-.byte 0xC5, 0xF8, 0x92, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x92, (%rdi), %k7
.byte 0xC5, 0xF9, 0x92, 0x9B
.byte 0xC5, 0xF9, 0x92, 0x6F
-.byte 0xC5, 0xF9, 0x92, 0x3F
+ .insn VEX.L0.66.0f.W0 0x92, (%rdi), %k7
.byte 0xC5, 0xFB, 0x92, 0x9B
.byte 0xC5, 0xFB, 0x92, 0x6F
-.byte 0xC5, 0xFB, 0x92, 0x3F
+ .insn VEX.L0.f2.0f.W0 0x92, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x92, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x92, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x92, 0x3F
+ .insn VEX.L0.66.0f.W1 0x92, (%rdi), %k7
.byte 0xC5, 0xF8, 0x93, 0x9B
.byte 0xC5, 0xF8, 0x93, 0x6F
-.byte 0xC5, 0xF8, 0x93, 0x3F
+ .insn VEX.L0.NP.0f.W0 0x93, (%rdi), %k7
.byte 0xC5, 0xF9, 0x93, 0x9B
.byte 0xC5, 0xF9, 0x93, 0x6F
-.byte 0xC5, 0xF9, 0x93, 0x3F
+ .insn VEX.L0.66.0f.W0 0x93, (%rdi), %k7
.byte 0xC5, 0xFB, 0x93, 0x9B
.byte 0xC5, 0xFB, 0x93, 0x6F
-.byte 0xC5, 0xFB, 0x93, 0x3F
+ .insn VEX.L0.f2.0f.W0 0x93, (%rdi), %k7
.byte 0xC4, 0xE1, 0xF9, 0x93, 0x9B
.byte 0xC4, 0xE1, 0xF9, 0x93, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
-.byte 0xc4, 0x62, 0x1, 0x1c, 0x41, 0x37
-.byte 0x62, 0x72, 0xad, 0x08, 0x1c, 0x01
+ .insn VEX.L0.66.0f.W1 0x93, (%rdi), %k7
+ .insn VEX.66.0f38.W0 0x1c, 0x37(%rcx), %xmm15, %xmm8
+ .insn EVEX.66.0f38.W1 0x1c, (%rcx), %xmm10, %xmm8
.byte 0x1
-.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
+ .insn EVEX.66.0f3a.W0 0x1b, $0x25, %ymm0, %xmm1
.byte 0x62, 0xf3
-.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+ .insn EVEX.66.0f3a.W0 0x23, $0x25, %xmm2, %xmm1, %xmm0
.byte 0x62
-.byte 0x62, 0xf2, 0x7d, 0x28, 0x5b, 0x41, 0x37
+ .insn EVEX.66.0f38.W0 0x5b, 0x37(%rcx){:d1}, %ymm0
foo: bnd ret
+ .att_syntax prefix
bad:
- # bndldx (%eax),(bad)
- .byte 0x0f
- .byte 0x1a
- .byte 0x30
+ # bndldx (%rax),(bad)
+ .insn 0x0f1a, (%rax), %esi
# bndmov (bad),%bnd0
- .byte 0x66
- .byte 0x0f
- .byte 0x1a
- .byte 0xc4
+ .insn 0x660f1a, %esp, %bnd0
# bndmov with REX.B set
- .byte 0x66
- .byte 0x41
- .byte 0x0f
- .byte 0x1a
- .byte 0xc0
+ .insn 0x660f1a, %r8d, %bnd0
# bndmov with REX.R set
- .byte 0x66
- .byte 0x44
- .byte 0x0f
- .byte 0x1a
- .byte 0xc0
+ .insn 0x660f1a, %bnd0, %r8d
# bndmk (bad),%bnd0
- .byte 0xf3
- .byte 0x0f
- .byte 0x1b
- .byte 0x05
- .long 0x90909090
+ .insn 0xf30f1b, -0x6f6f6f70(%rip), %bnd0
+#as: --divide
#objdump: -drw
#name: x86-64 nops
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 cs nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 2e 66 0f 1f 84 00 00 00 00 00 cs nopw 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 0f 19 ff nop %edi
[ ]*[a-f0-9]+: 0f 1a ff nop %edi
[ ]*[a-f0-9]+: 0f 1b ff nop %edi
.text
- .byte 0x0f, 0x1f, 0x0
- .byte 0x0f, 0x1f, 0x40, 0x0
- .byte 0x0f, 0x1f, 0x44, 0x0, 0x0
- .byte 0x66, 0x0f, 0x1f, 0x44, 0x0, 0x0
- .byte 0x0f, 0x1f, 0x80, 0x0, 0x0, 0x0, 0x0
- .byte 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
- .byte 0x66, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
- .byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .insn 0x0f1f/0, (%rax)
+ .insn {disp8} 0x0f1f/0, 0(%rax)
+ .insn {disp8} 0x0f1f/0, 0(%rax,%rax)
+ .insn {disp8} data16 0x0f1f/0, 0(%rax,%rax)
+ .insn {disp32} 0x0f1f/0, 0(%rax)
+ .insn {disp32} 0x0f1f/0, 0(%rax,%rax)
+ .insn {disp32} data16 0x0f1f/0, 0(%rax,%rax)
+ .insn {disp32} data16 0x0f1f/0, %cs:0(%rax,%rax)
# reg,reg
- .byte 0x0f, 0x19, 0xff
- .byte 0x0f, 0x1a, 0xff
- .byte 0x0f, 0x1b, 0xff
- .byte 0x0f, 0x1c, 0xff
- .byte 0x0f, 0x1d, 0xff
- .byte 0x0f, 0x1e, 0xff
- .byte 0x0f, 0x1f, 0xff
+ .insn 0x0f19, %edi, %edi
+ .insn 0x0f1a, %edi, %edi
+ .insn 0x0f1b, %edi, %edi
+ .insn 0x0f1c, %edi, %edi
+ .insn 0x0f1d, %edi, %edi
+ .insn 0x0f1e, %edi, %edi
+ .insn 0x0f1f, %edi, %edi
# with base and imm8
- .byte 0x0f, 0x19, 0x5A, 0x22
- .byte 0x0f, 0x1c, 0x5A, 0x22
- .byte 0x0f, 0x1d, 0x5A, 0x22
- .byte 0x0f, 0x1e, 0x5A, 0x22
- .byte 0x0f, 0x1f, 0x5A, 0x22
+ .insn 0x0f19/3, 0x22(%rdx)
+ .insn 0x0f1c/3, 0x22(%rdx)
+ .insn 0x0f1d/3, 0x22(%rdx)
+ .insn 0x0f1e/3, 0x22(%rdx)
+ .insn 0x0f1f/3, 0x22(%rdx)
# with sib and imm32
- .byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
- .byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
+ .insn 0x0f19/3, 0x44332211(%rbp,%rbx)
+ .insn 0x0f1c/3, 0x44332211(%rbp,%rbx)
+ .insn 0x0f1d/3, 0x44332211(%rbp,%rbx)
+ .insn 0x0f1e/3, 0x44332211(%rbp,%rbx)
+ .insn 0x0f1f/3, 0x44332211(%rbp,%rbx)
- .byte 0x0f, 0x19, 0x04, 0x60
- .byte 0x0f, 0x1c, 0x0c, 0x60
- .byte 0x0f, 0x1d, 0x04, 0x60
- .byte 0x0f, 0x1e, 0x04, 0x60
- .byte 0x0f, 0x1f, 0x04, 0x60
+ .allow_index_reg
+ .insn 0x0f19/0, (%rax,%riz,2)
+ .insn 0x0f1c/1, (%rax,%riz,2)
+ .insn 0x0f1d/0, (%rax,%riz,2)
+ .insn 0x0f1e/0, (%rax,%riz,2)
+ .insn 0x0f1f/0, (%rax,%riz,2)
- .byte 0x0f, 0x19, 0x04, 0x59
- .byte 0x0f, 0x1c, 0x0c, 0x59
- .byte 0x0f, 0x1d, 0x04, 0x59
- .byte 0x0f, 0x1e, 0x04, 0x59
- .byte 0x0f, 0x1f, 0x04, 0x59
+ .insn 0x0f19/0, (%rcx,%rbx,2)
+ .insn 0x0f1c/1, (%rcx,%rbx,2)
+ .insn 0x0f1d/0, (%rcx,%rbx,2)
+ .insn 0x0f1e/0, (%rcx,%rbx,2)
+ .insn 0x0f1f/0, (%rcx,%rbx,2)
nop %rax
nop %eax
.text
# All the followings are bad opcodes for x86-64.
- .byte 0xc5
- .byte 0xac
- .byte 0x46
- .byte 0xf5
- .byte 0xc5
- .byte 0x2c
- .byte 0x46
- .byte 0xf5
+ .insn VEX.L1.0f 0x46, %k5, %r10d, %k6
+ .insn VEX.L1.0f 0x46, %k5, %r10d, %r14d
-#as: -J
+#as: -J --divide
#objdump: -drw
#name: x86-64 opcode
int3
int $0x90
- .byte 0xf6, 0xc9, 0x01
- .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
- .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
- .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
- .byte 0xc0, 0xf0, 0x02
- .byte 0xc1, 0xf0, 0x01
- .byte 0x48, 0xc1, 0xf0, 0x01
- .byte 0xd0, 0xf0
- .byte 0xd1, 0xf0
- .byte 0x48, 0xd1, 0xf0
- .byte 0xd2, 0xf0
- .byte 0xd3, 0xf0
- .byte 0x48, 0xd3, 0xf0
+ .insn 0xf6/1, $1, %cl
+ .insn 0xf7/1, $2{:u16}, %cx
+ .insn 0xf7/1, $4{:u32}, %ecx
+ .insn 0xf7/1, $8{:s32}, %rcx
+ .insn 0xc0/6, $2, %al
+ .insn 0xc1/6, $1, %eax
+ .insn 0xc1/6, $1, %rax
+ .insn 0xd0/6, %al
+ .insn 0xd1/6, %eax
+ .insn 0xd1/6, %rax
+ .insn 0xd2/6, %al
+ .insn 0xd3/6, %eax
+ .insn 0xd3/6, %rax
+#as: --divide
#objdump: -dw -Mintel
#name: x86-64 prefetch (Intel disassembly)
#source: prefetch.s
+#as: --divide
#objdump: -dw
#name: x86-64 prefetch
#source: prefetch.s
-#as:
+#as: --divide
#objdump: -dw
#name: x86-64 PREFETCHI INVAL REGISTER insns
.text
#prefetchit0 (%rcx) PREFETCHIT0/1 apply without RIP-relative addressing, should stay NOPs.
- .byte 0x0f
- .byte 0x18
- .byte 0x39
+ .insn 0x0f18/7, (%rcx)
+
#prefetchit1 (%rcx) PREFETCHIT1/1 apply without RIP-relative addressing, should stay NOPs.
- .byte 0x0f
- .byte 0x18
- .byte 0x31
+ .insn 0x0f18/6, (%rcx)