move gpio from cpu.peripherals to com

diff --git a/misoclib/com/gpio/__init__.py b/misoclib/com/gpio/__init__.py
new file mode 100644 (file)
index 0000000..e8ae09d
--- /dev/null
+++ b/misoclib/com/gpio/__init__.py
@@ -0,0 +1,27 @@
+from migen.fhdl.std import *
+from migen.genlib.cdc import MultiReg
+from migen.bank.description import *
+
+class GPIOIn(Module, AutoCSR):
+       def __init__(self, signal):
+               self._in = CSRStatus(flen(signal))
+               self.specials += MultiReg(signal, self._in.status)
+
+class GPIOOut(Module, AutoCSR):
+       def __init__(self, signal):
+               self._out = CSRStorage(flen(signal))
+               self.comb += signal.eq(self._out.storage)
+
+class GPIOInOut(Module):
+       def __init__(self, in_signal, out_signal):
+               self.submodules.gpio_in = GPIOIn(in_signal)
+               self.submodules.gpio_out = GPIOOut(out_signal)
+
+       def get_csrs(self):
+               return self.gpio_in.get_csrs() + self.gpio_out.get_csrs()
+
+class Blinker(Module):
+       def __init__(self, signal, divbits=26):
+               counter = Signal(divbits)
+               self.comb += signal.eq(counter[divbits-1])
+               self.sync += counter.eq(counter + 1)

diff --git a/misoclib/cpu/peripherals/gpio/__init__.py b/misoclib/cpu/peripherals/gpio/__init__.py
deleted file mode 100644 (file)
index e8ae09d..0000000
--- a/misoclib/cpu/peripherals/gpio/__init__.py
+++ /dev/null
@@ -1,27 +0,0 @@
-from migen.fhdl.std import *
-from migen.genlib.cdc import MultiReg
-from migen.bank.description import *
-
-class GPIOIn(Module, AutoCSR):
-       def __init__(self, signal):
-               self._in = CSRStatus(flen(signal))
-               self.specials += MultiReg(signal, self._in.status)
-
-class GPIOOut(Module, AutoCSR):
-       def __init__(self, signal):
-               self._out = CSRStorage(flen(signal))
-               self.comb += signal.eq(self._out.storage)
-
-class GPIOInOut(Module):
-       def __init__(self, in_signal, out_signal):
-               self.submodules.gpio_in = GPIOIn(in_signal)
-               self.submodules.gpio_out = GPIOOut(out_signal)
-
-       def get_csrs(self):
-               return self.gpio_in.get_csrs() + self.gpio_out.get_csrs()
-
-class Blinker(Module):
-       def __init__(self, signal, divbits=26):
-               counter = Signal(divbits)
-               self.comb += signal.eq(counter[divbits-1])
-               self.sync += counter.eq(counter + 1)

diff --git a/targets/mlabs_video.py b/targets/mlabs_video.py
index c24c0456d6eec097c3608ee4bf652777030a6d76..c918686ed557cdd2266f9a0484c880b0e8e0883d 100644 (file)
--- a/targets/mlabs_video.py
+++ b/targets/mlabs_video.py
@@ -6,16 +6,14 @@ from migen.fhdl.std import *
 from mibuild.generic_platform import ConstraintError
 
 from misoclib.others import mxcrg
-from misoclib.mem import sdram
 from misoclib.mem.sdram.module import MT46V32M16
 from misoclib.mem.sdram.phy import s6ddrphy
 from misoclib.mem.sdram.core.lasmicon import LASMIconSettings
 from misoclib.mem.flash import norflash16
-from misoclib.cpu.peripherals import gpio
 from misoclib.video import framebuffer
 from misoclib.soc import mem_decoder
 from misoclib.soc.sdram import SDRAMSoC
-
+from misoclib.com import gpio
 from misoclib.com.liteeth.phy import LiteEthPHY
 from misoclib.com.liteeth.mac import LiteEthMAC