altivec.h (vec_pmsum_be): New #define.

[gcc]

2015-08-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.h (vec_pmsum_be): New #define.
	(vec_shasigma_be): New #define.
	* config/rs6000/rs6000-builtin.def (VPMSUMB): New BU_P8V_AV2_2.
	(VPMSUMH): Likewise.
	(VPMSUMW): Likewise.
	(VPMSUMD): Likewise.
	(VPMSUM): New BU_P8V_OVERLOAD_2.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): New
	entries for VEC_MADD and VEC_VPMSUM.

[gcc/testsuite]

2015-08-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/altivec-35.c (foo): Add tests for vec_madd.
	* gcc.target/powerpc/p8vector-builtin-8.c (foo): Add tests for
	vec_vpmsum_be and vec_shasigma_be.

From-SVN: r227036

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 17855584dfbaee7cea375320e3bda7483f701d02..33da6a99ea9c8d07c638537f39c5f757ce38a284 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2015-08-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * config/rs6000/altivec.h (vec_pmsum_be): New #define.
+       (vec_shasigma_be): New #define.
+       * config/rs6000/rs6000-builtin.def (VPMSUMB): New BU_P8V_AV2_2.
+       (VPMSUMH): Likewise.
+       (VPMSUMW): Likewise.
+       (VPMSUMD): Likewise.
+       (VPMSUM): New BU_P8V_OVERLOAD_2.
+       * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): New
+       entries for VEC_MADD and VEC_VPMSUM.
+
 2015-08-20  Georg-Johann Lay  <avr@gjlay.de>
 
        * config/avr/avr.c (avr_insert_attributes): In diagnostic essage:

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 3ef6bc85ecd8551b508d72af09db66c089e736f9..1c00099c78d5d3c071ea5839071bfdc054a84955 100644 (file)
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -208,6 +208,8 @@
 #define vec_lvebx __builtin_vec_lvebx
 #define vec_lvehx __builtin_vec_lvehx
 #define vec_lvewx __builtin_vec_lvewx
+#define vec_pmsum_be __builtin_vec_vpmsum
+#define vec_shasigma_be __builtin_crypto_vshasigma
 /* Cell only intrinsics.  */
 #ifdef __PPU__
 #define vec_lvlx __builtin_vec_lvlx

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 7beddf64d1b56b356bed11dd47d94648de8f7618..85082ec0ee2112689b8849d4159f68db6ec3c8d5 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1489,6 +1489,10 @@ BU_P8V_AV_2 (VPKUDUM,            "vpkudum",      CONST,  altivec_vpkudum)
 BU_P8V_AV_2 (VPKSDSS,          "vpksdss",      CONST,  altivec_vpksdss)
 BU_P8V_AV_2 (VPKUDUS,          "vpkudus",      CONST,  altivec_vpkudus)
 BU_P8V_AV_2 (VPKSDUS,          "vpksdus",      CONST,  altivec_vpksdus)
+BU_P8V_AV_2 (VPMSUMB,          "vpmsumb",      CONST,  crypto_vpmsumb)
+BU_P8V_AV_2 (VPMSUMH,          "vpmsumh",      CONST,  crypto_vpmsumh)
+BU_P8V_AV_2 (VPMSUMW,          "vpmsumw",      CONST,  crypto_vpmsumw)
+BU_P8V_AV_2 (VPMSUMD,          "vpmsumd",      CONST,  crypto_vpmsumd)
 BU_P8V_AV_2 (VRLD,             "vrld",         CONST,  vrotlv2di3)
 BU_P8V_AV_2 (VSLD,             "vsld",         CONST,  vashlv2di3)
 BU_P8V_AV_2 (VSRD,             "vsrd",         CONST,  vlshrv2di3)
@@ -1570,6 +1574,7 @@ BU_P8V_OVERLOAD_2 (VPKSDSS,       "vpksdss")
 BU_P8V_OVERLOAD_2 (VPKSDUS,    "vpksdus")
 BU_P8V_OVERLOAD_2 (VPKUDUM,    "vpkudum")
 BU_P8V_OVERLOAD_2 (VPKUDUS,    "vpkudus")
+BU_P8V_OVERLOAD_2 (VPMSUM,      "vpmsum")
 BU_P8V_OVERLOAD_2 (VRLD,       "vrld")
 BU_P8V_OVERLOAD_2 (VSLD,       "vsld")
 BU_P8V_OVERLOAD_2 (VSRAD,      "vsrad")

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index d45bc93b10ad269eb6674c059c785637609d528d..5fc2b53adfe203f804c76e5b083efc371e2be01d 100644 (file)
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -2937,6 +2937,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
   { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
+  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
+    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
+  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
+    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
+  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
+    RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
+  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
   { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
@@ -4171,6 +4179,19 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
 
+  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMB,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMH,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI,
+    RS6000_BTI_unsigned_V8HI, 0 },
+  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMW,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
+  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMD,
+    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI,
+    RS6000_BTI_unsigned_V2DI, 0 },
+
   { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index eed9f5b39550699dce497626366c72cba2a89d24..a91ce0d9b60c4b72a81a9eaf5ade3844e3147f52 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-08-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * gcc.target/powerpc/altivec-35.c (foo): Add tests for vec_madd.
+       * gcc.target/powerpc/p8vector-builtin-8.c (foo): Add tests for
+       vec_vpmsum_be and vec_shasigma_be.
+
 2015-08-20  Alan Lawrence  <alan.lawrence@arm.com>
 
        * lib/target-supports.exp

diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-35.c b/gcc/testsuite/gcc.target/powerpc/altivec-35.c
index 6217c9f966bcb56152a42a44ef734d1b86a63672..46e8eed7fea6701948a606fdb5956dc2d0f456c0 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/altivec-35.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-35.c
@@ -7,10 +7,19 @@
 /* Test Altivec built-ins added for version 1.1 of ELFv2 ABI.  */
 
 vector signed int vsia, vsib;
+vector signed short vssa, vssb, vssc;
+vector unsigned short vusa, vusb, vusc;
 
-void foo (vector signed int *vsir)
+void foo (vector signed int *vsir,
+         vector signed short *vssr,
+         vector unsigned short *vusr)
 {
   *vsir++ = vec_addc (vsia, vsib);
+  *vssr++ = vec_madd (vssa, vssb, vssc);
+  *vssr++ = vec_madd (vssa, vusb, vusc);
+  *vssr++ = vec_madd (vusa, vssb, vssc);
+  *vusr++ = vec_madd (vusa, vusb, vusc);
 }
 
 /* { dg-final { scan-assembler-times "vaddcuw" 1 } } */
+/* { dg-final { scan-assembler-times "vmladduhm" 4 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
index 4554099b6a75a5c4733b3fe12b0164b9376b1940..bb5e182832e194e65f7abbc78bb680b55893a9ae 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
@@ -8,7 +8,9 @@
 
 vector unsigned char      vuca, vucb, vucc;
 vector bool     char      vbca, vbcb;
+vector unsigned short     vusa, vusb;
 vector bool     short     vbsa, vbsb;
+vector unsigned int       vuia, vuib;
 vector bool     int       vbia, vbib;
 vector signed   long long vsla, vslb;
 vector unsigned long long vula, vulb, vulc;
@@ -19,7 +21,9 @@ vector          double    vda,  vdb;
 
 void foo (vector unsigned char *vucr,
          vector bool char *vbcr,
+         vector unsigned short *vusr,
          vector bool short *vbsr,
+         vector unsigned int *vuir,
          vector bool int *vbir,
          vector unsigned long long *vulr,
          vector bool long long *vblr,
@@ -48,6 +52,12 @@ void foo (vector unsigned char *vucr,
   *vblr++ = vec_orc (vbla, vblb);
   *vbsr++ = vec_orc (vbsa, vbsb);
   *vblr++ = vec_perm (vbla, vblb, vucc);
+  *vusr++ = vec_pmsum_be (vuca, vucb);
+  *vuir++ = vec_pmsum_be (vusa, vusb);
+  *vulr++ = vec_pmsum_be (vuia, vuib);
+  *vuxr++ = vec_pmsum_be (vula, vulb);
+  *vuir++ = vec_shasigma_be (vuia, 0, 1);
+  *vulr++ = vec_shasigma_be (vula, 0, 1);
 }
 
 /* { dg-final { scan-assembler-times "vaddcuq" 2 } } */
@@ -59,4 +69,10 @@ void foo (vector unsigned char *vucr,
 /* { dg-final { scan-assembler-times "xxlnand" 4 } } */
 /* { dg-final { scan-assembler-times "xxlorc" 4 } } */
 /* { dg-final { scan-assembler-times "vperm" 1 } } */
+/* { dg-final { scan-assembler-times "vpmsumb" 1 } } */
+/* { dg-final { scan-assembler-times "vpmsumh" 1 } } */
+/* { dg-final { scan-assembler-times "vpmsumw" 1 } } */
+/* { dg-final { scan-assembler-times "vpmsumd" 1 } } */
+/* { dg-final { scan-assembler-times "vshasigmaw" 1 } } */
+/* { dg-final { scan-assembler-times "vshasigmad" 1 } } */