+2013-09-09 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * combine.c (simplify_set, expand_field_assignment, extract_left_shift)
+ (force_to_mode, simplify_shift_const_1, simplify_comparison):
+ Use gen_int_mode with the mode of the associated simplify_* call.
+ * explow.c (probe_stack_range, anti_adjust_stack_and_probe): Likewise.
+ * expmed.c (expand_shift_1): Likewise.
+ * function.c (instantiate_virtual_regs_in_insn): Likewise.
+ * loop-iv.c (iv_number_of_iterations): Likewise.
+ * loop-unroll.c (unroll_loop_runtime_iterations): Likewise.
+ * simplify-rtx.c (simplify_binary_operation_1): Likewise.
+
2013-09-09 Richard Sandiford <rdsandiford@googlemail.com>
* asan.c (asan_clear_shadow): Use gen_int_mode with the mode
*cc_use = old_cc_use;
other_changed = 0;
- op0 = simplify_gen_binary (XOR, GET_MODE (op0),
- op0, GEN_INT (mask));
+ op0 = simplify_gen_binary (XOR, GET_MODE (op0), op0,
+ gen_int_mode (mask,
+ GET_MODE (op0)));
}
}
}
/* If position is ADJUST - X, new position is X. */
pos = XEXP (pos, 0);
else
- pos = simplify_gen_binary (MINUS, GET_MODE (pos),
- GEN_INT (GET_MODE_PRECISION (
- GET_MODE (inner))
- - len),
- pos);
+ {
+ HOST_WIDE_INT prec = GET_MODE_PRECISION (GET_MODE (inner));
+ pos = simplify_gen_binary (MINUS, GET_MODE (pos),
+ gen_int_mode (prec - len,
+ GET_MODE (pos)),
+ pos);
+ }
}
}
/* Now compute the equivalent expression. Make a copy of INNER
for the SET_DEST in case it is a MEM into which we will substitute;
we don't want shared RTL in that case. */
- mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << len) - 1);
+ mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << len) - 1,
+ compute_mode);
cleared = simplify_gen_binary (AND, compute_mode,
simplify_gen_unary (NOT, compute_mode,
simplify_gen_binary (ASHIFT,
&& (UINTVAL (XEXP (x, 1))
& ((((unsigned HOST_WIDE_INT) 1 << count)) - 1)) == 0
&& (tem = extract_left_shift (XEXP (x, 0), count)) != 0)
- return simplify_gen_binary (code, mode, tem,
- GEN_INT (INTVAL (XEXP (x, 1)) >> count));
-
+ {
+ HOST_WIDE_INT val = INTVAL (XEXP (x, 1)) >> count;
+ return simplify_gen_binary (code, mode, tem,
+ gen_int_mode (val, mode));
+ }
break;
default:
unsigned HOST_WIDE_INT cval
= UINTVAL (XEXP (x, 1))
| (GET_MODE_MASK (GET_MODE (x)) & ~mask);
- int width = GET_MODE_PRECISION (GET_MODE (x));
rtx y;
- /* If MODE is narrower than HOST_WIDE_INT and CVAL is a negative
- number, sign extend it. */
- if (width > 0 && width < HOST_BITS_PER_WIDE_INT
- && (cval & (HOST_WIDE_INT_1U << (width - 1))) != 0)
- cval |= HOST_WIDE_INT_M1U << width;
-
- y = simplify_gen_binary (AND, GET_MODE (x),
- XEXP (x, 0), GEN_INT (cval));
+ y = simplify_gen_binary (AND, GET_MODE (x), XEXP (x, 0),
+ gen_int_mode (cval, GET_MODE (x)));
if (set_src_cost (y, optimize_this_for_speed_p)
< set_src_cost (x, optimize_this_for_speed_p))
x = y;
&& (UINTVAL (XEXP (x, 1))
& ~nonzero_bits (XEXP (x, 0), GET_MODE (x))) == 0)
{
- temp = GEN_INT ((INTVAL (XEXP (x, 1)) & mask)
- << INTVAL (XEXP (XEXP (x, 0), 1)));
+ temp = gen_int_mode ((INTVAL (XEXP (x, 1)) & mask)
+ << INTVAL (XEXP (XEXP (x, 0), 1)),
+ GET_MODE (x));
temp = simplify_gen_binary (GET_CODE (x), GET_MODE (x),
XEXP (XEXP (x, 0), 0), temp);
x = simplify_gen_binary (LSHIFTRT, GET_MODE (x), temp,
&& INTVAL (XEXP (x, 1)) >= 0)
{
temp = simplify_binary_operation (code == ROTATE ? ROTATERT : ROTATE,
- GET_MODE (x), GEN_INT (mask),
+ GET_MODE (x),
+ gen_int_mode (mask, GET_MODE (x)),
XEXP (x, 1));
if (temp && CONST_INT_P (temp))
SUBST (XEXP (x, 0),
nonzero bits of the inner shift the same way the
outer shift will. */
- mask_rtx = GEN_INT (nonzero_bits (varop, GET_MODE (varop)));
+ mask_rtx = gen_int_mode (nonzero_bits (varop, GET_MODE (varop)),
+ result_mode);
mask_rtx
= simplify_const_binary_operation (code, result_mode, mask_rtx,
&& !(code == ASHIFTRT && GET_CODE (varop) == XOR
&& 0 > trunc_int_for_mode (INTVAL (XEXP (varop, 1)),
shift_mode))
- && (new_rtx = simplify_const_binary_operation (code, result_mode,
- XEXP (varop, 1),
- GEN_INT (count))) != 0
+ && (new_rtx = simplify_const_binary_operation
+ (code, result_mode,
+ gen_int_mode (INTVAL (XEXP (varop, 1)), result_mode),
+ GEN_INT (count))) != 0
&& CONST_INT_P (new_rtx)
&& merge_outer_ops (&outer_op, &outer_const, GET_CODE (varop),
INTVAL (new_rtx), result_mode, &complement_p))
if (op1 == const0_rtx && (code == LT || code == GE)
&& HWI_COMPUTABLE_MODE_P (mode))
{
+ unsigned HOST_WIDE_INT sign
+ = (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1);
op0 = simplify_gen_binary (AND, tmode,
gen_lowpart (tmode, op0),
- GEN_INT ((unsigned HOST_WIDE_INT) 1
- << (GET_MODE_BITSIZE (mode)
- - 1)));
+ gen_int_mode (sign, mode));
code = (code == LT) ? NE : EQ;
break;
}
/* ROUNDED_SIZE = SIZE & -PROBE_INTERVAL */
rounded_size
- = simplify_gen_binary (AND, Pmode, size, GEN_INT (-PROBE_INTERVAL));
+ = simplify_gen_binary (AND, Pmode, size,
+ gen_int_mode (-PROBE_INTERVAL, Pmode));
rounded_size_op = force_operand (rounded_size, NULL_RTX);
/* ROUNDED_SIZE = SIZE & -PROBE_INTERVAL */
rounded_size
- = simplify_gen_binary (AND, Pmode, size, GEN_INT (-PROBE_INTERVAL));
+ = simplify_gen_binary (AND, Pmode, size,
+ gen_int_mode (-PROBE_INTERVAL, Pmode));
rounded_size_op = force_operand (rounded_size, NULL_RTX);
other_amount
= simplify_gen_unary (NEG, GET_MODE (op1),
op1, GET_MODE (op1));
+ HOST_WIDE_INT mask = GET_MODE_PRECISION (mode) - 1;
other_amount
- = simplify_gen_binary (AND, GET_MODE (op1),
- other_amount,
- GEN_INT (GET_MODE_PRECISION (mode)
- - 1));
+ = simplify_gen_binary (AND, GET_MODE (op1), other_amount,
+ gen_int_mode (mask, GET_MODE (op1)));
}
shifted = force_reg (mode, shifted);
for_each_rtx (&SET_SRC (set), instantiate_virtual_regs_in_rtx, NULL);
x = simplify_gen_binary (PLUS, GET_MODE (new_rtx), SET_SRC (set),
- GEN_INT (-offset));
+ gen_int_mode (-offset, GET_MODE (new_rtx)));
x = force_operand (x, new_rtx);
if (x != new_rtx)
emit_move_insn (new_rtx, x);
bound = GEN_INT (((unsigned HOST_WIDEST_INT) 1 << (size - 1 ) << 1) - 1);
tmp1 = lowpart_subreg (mode, iv1.base, comp_mode);
- tmp = simplify_gen_binary (UMOD, mode, tmp1, GEN_INT (d));
+ tmp = simplify_gen_binary (UMOD, mode, tmp1, gen_int_mode (d, mode));
assumption = simplify_gen_relational (NE, SImode, mode, tmp, const0_rtx);
desc->infinite = alloc_EXPR_LIST (0, assumption, desc->infinite);
- tmp = simplify_gen_binary (UDIV, mode, tmp1, GEN_INT (d));
+ tmp = simplify_gen_binary (UDIV, mode, tmp1, gen_int_mode (d, mode));
inv = inverse (s, size);
tmp = simplify_gen_binary (MULT, mode, tmp, gen_int_mode (inv, mode));
desc->niter_expr = simplify_gen_binary (AND, mode, tmp, bound);
gcc_assert (!desc->const_iter);
desc->niter_expr =
simplify_gen_binary (UDIV, desc->mode, old_niter,
- GEN_INT (max_unroll + 1));
+ gen_int_mode (max_unroll + 1, desc->mode));
loop->nb_iterations_upper_bound
= loop->nb_iterations_upper_bound.udiv (double_int::from_uhwi (max_unroll
+ 1),
&& CONST_INT_P (XEXP (op0, 1))
&& CONST_INT_P (op1)
&& (UINTVAL (XEXP (op0, 1)) & UINTVAL (op1)) != 0)
- return simplify_gen_binary (IOR, mode,
- simplify_gen_binary
- (AND, mode, XEXP (op0, 0),
- GEN_INT (UINTVAL (XEXP (op0, 1))
- & ~UINTVAL (op1))),
- op1);
+ {
+ rtx tmp = simplify_gen_binary (AND, mode, XEXP (op0, 0),
+ gen_int_mode (UINTVAL (XEXP (op0, 1))
+ & ~UINTVAL (op1),
+ mode));
+ return simplify_gen_binary (IOR, mode, tmp, op1);
+ }
/* If OP0 is (ashiftrt (plus ...) C), it might actually be
a (sign_extend (plus ...)). Then check if OP1 is a CONST_INT and
/* Try to simplify ~A&C | ~B&C. */
if (na_c != NULL_RTX)
return simplify_gen_binary (IOR, mode, na_c,
- GEN_INT (~bval & cval));
+ gen_int_mode (~bval & cval, mode));
}
else
{
if (na_c == const0_rtx)
{
rtx a_nc_b = simplify_gen_binary (AND, mode, a,
- GEN_INT (~cval & bval));
+ gen_int_mode (~cval & bval,
+ mode));
return simplify_gen_binary (IOR, mode, a_nc_b,
- GEN_INT (~bval & cval));
+ gen_int_mode (~bval & cval,
+ mode));
}
}
}
if (CONST_INT_P (trueop1)
&& exact_log2 (UINTVAL (trueop1)) > 0)
return simplify_gen_binary (AND, mode, op0,
- GEN_INT (INTVAL (op1) - 1));
+ gen_int_mode (INTVAL (op1) - 1, mode));
break;
case MOD:
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