add sv.isel asm-disasm tests to test_pysvp64dis.py

diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py
index 5f9cfc64b14df92b10f2ba9a8bccc3feb799add7..8a83c2ba7fe1f88e72b93c8fa94aabe9d0350971 100644 (file)
--- a/src/openpower/sv/trans/test_pysvp64dis.py
+++ b/src/openpower/sv/trans/test_pysvp64dis.py
@@ -46,6 +46,15 @@ class SVSTATETestCase(unittest.TestCase):
                         ]
         self._do_tst(expected)
 
+    def test_3_sv_isel(self):
+        expected = [
+                    'sv.isel 12,2,3,33',
+                    'sv.isel 12,2,3,*33',
+                    'sv.isel 12,2,3,*483',
+                    'sv.isel 12,2,3,63',
+                        ]
+        self._do_tst(expected)
+
 if __name__ == "__main__":
     unittest.main()