+2018-09-17 Cesar Philippidis <cesar@codesourcery.com>
+ Bernd Schmidt <bernds_cb1@t-online.de>
+
+ * config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable with
+ SImode args.
+
2018-09-17 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (truncxf<mode>2_i387_noop_unspec): Change
UNSPECV_LOCK))
(set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
(match_dup 1))]
- "TARGET_SM35"
+ "<MODE>mode == SImode || TARGET_SM35"
"%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;"
[(set_attr "atomic" "true")])
+2018-09-17 Cesar Philippidis <cesar@codesourcery.com>
+ Bernd Schmidt <bernds_cb1@t-online.de>
+
+ * gcc.target/nvptx/atomic-fetch-2.c: Rename to ...
+ * gcc.target/nvptx/atomic_fetch-2.c: ... this.
+ * gcc.target/nvptx/atomic_fetch-3.c: New test.
+
2018-09-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/87328
+++ /dev/null
-/* Test the nvptx atomic instructions for __atomic_fetch_OP for SM_30
- targets. */
-
-/* { dg-do compile } */
-/* { dg-options "-O2 -misa=sm_30" } */
-
-int
-main()
-{
- unsigned long long a = ~0;
- unsigned b = 0xa;
-
- __atomic_fetch_add (&a, b, 0);
- __atomic_fetch_and (&a, b, 0);
- __atomic_fetch_or (&a, b, 0);
- __atomic_fetch_xor (&a, b, 0);
-
- return a;
-}
-
-/* { dg-final { scan-assembler-not "atom.b64.add" } } */
-/* { dg-final { scan-assembler-not "atom.b64.and" } } */
-/* { dg-final { scan-assembler-not "atom.b64.or" } } */
-/* { dg-final { scan-assembler-not "atom.b64.xor" } } */
--- /dev/null
+/* Test the nvptx atomic instructions for __atomic_fetch_OP for SM_30
+ targets. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -misa=sm_30" } */
+
+int
+main()
+{
+ unsigned long long a = ~0;
+ unsigned b = 0xa;
+
+ __atomic_fetch_add (&a, b, 0);
+ __atomic_fetch_and (&a, b, 0);
+ __atomic_fetch_or (&a, b, 0);
+ __atomic_fetch_xor (&a, b, 0);
+
+ return a;
+}
+
+/* { dg-final { scan-assembler-not "atom.b64.add" } } */
+/* { dg-final { scan-assembler-not "atom.b64.and" } } */
+/* { dg-final { scan-assembler-not "atom.b64.or" } } */
+/* { dg-final { scan-assembler-not "atom.b64.xor" } } */
--- /dev/null
+/* Test the nvptx atomic instructions for __atomic_fetch_OP for
+ SImode arguments. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -m32" } */
+
+int
+main()
+{
+ unsigned long a = ~0;
+ unsigned b = 0xa;
+
+ __atomic_fetch_add (&a, b, 0);
+ __atomic_fetch_and (&a, b, 0);
+ __atomic_fetch_or (&a, b, 0);
+ __atomic_fetch_xor (&a, b, 0);
+
+ return a;
+}
+
+/* { dg-final { scan-assembler "atom.add.u32" } } */
+/* { dg-final { scan-assembler "atom.b32.and" } } */
+/* { dg-final { scan-assembler "atom.b32.or" } } */
+/* { dg-final { scan-assembler "atom.b32.xor" } } */