[nvptx] Add atomic_fetch* support for SImode arguments.
authorCesar Philippidis <cesar@codesourcery.com>
Mon, 17 Sep 2018 19:59:19 +0000 (12:59 -0700)
committerCesar Philippidis <cesar@gcc.gnu.org>
Mon, 17 Sep 2018 19:59:19 +0000 (12:59 -0700)
gcc/
* config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable with
SImode args.

gcc/testsuite/
* gcc.target/nvptx/atomic-fetch-2.c: Rename to ...
* gcc.target/nvptx/atomic_fetch-2.c: ... this.
* gcc.target/nvptx/atomic_fetch-3.c: New test.

Co-Authored-By: Bernd Schmidt <bernds_cb1@t-online.de>
From-SVN: r264371

gcc/ChangeLog
gcc/config/nvptx/nvptx.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/nvptx/atomic-fetch-2.c [deleted file]
gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c [new file with mode: 0644]

index a9e05898ab95334e23bb12c16b6478f2f19a5763..017aa6446cc5f3d887cfd1a49236eb998d7184a1 100644 (file)
@@ -1,3 +1,9 @@
+2018-09-17  Cesar Philippidis  <cesar@codesourcery.com>
+           Bernd Schmidt <bernds_cb1@t-online.de>
+
+       * config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable with
+       SImode args.
+
 2018-09-17  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.md (truncxf<mode>2_i387_noop_unspec): Change
index dd6032d021bd4d6d80454c12bf2e1de28e3342fe..ca00b1d8073d9fc0399c38e0ef537b78ce74e5d4 100644 (file)
          UNSPECV_LOCK))
    (set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
        (match_dup 1))]
-  "TARGET_SM35"
+  "<MODE>mode == SImode || TARGET_SM35"
   "%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;"
   [(set_attr "atomic" "true")])
 
index 5cce863e58af3eeb8c85eaf0b74dad033c5199e4..ddf5f730e79a9656adcad57b4b3a464e186aa9b9 100644 (file)
@@ -1,3 +1,10 @@
+2018-09-17  Cesar Philippidis  <cesar@codesourcery.com>
+           Bernd Schmidt <bernds_cb1@t-online.de>
+
+       * gcc.target/nvptx/atomic-fetch-2.c: Rename to ...
+       * gcc.target/nvptx/atomic_fetch-2.c: ... this.
+       * gcc.target/nvptx/atomic_fetch-3.c: New test.
+
 2018-09-17  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/87328
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-fetch-2.c b/gcc/testsuite/gcc.target/nvptx/atomic-fetch-2.c
deleted file mode 100644 (file)
index 1d35a17..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-/* Test the nvptx atomic instructions for __atomic_fetch_OP for SM_30
-   targets.  */
-
-/* { dg-do compile } */
-/* { dg-options "-O2 -misa=sm_30" } */
-
-int
-main()
-{
-  unsigned long long a = ~0;
-  unsigned b = 0xa;
-
-  __atomic_fetch_add (&a, b, 0);
-  __atomic_fetch_and (&a, b, 0);
-  __atomic_fetch_or (&a, b, 0);
-  __atomic_fetch_xor (&a, b, 0);
-  
-  return a;
-}
-
-/* { dg-final { scan-assembler-not "atom.b64.add" } } */
-/* { dg-final { scan-assembler-not "atom.b64.and" } } */
-/* { dg-final { scan-assembler-not "atom.b64.or" } } */
-/* { dg-final { scan-assembler-not "atom.b64.xor" } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c
new file mode 100644 (file)
index 0000000..1d35a17
--- /dev/null
@@ -0,0 +1,24 @@
+/* Test the nvptx atomic instructions for __atomic_fetch_OP for SM_30
+   targets.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -misa=sm_30" } */
+
+int
+main()
+{
+  unsigned long long a = ~0;
+  unsigned b = 0xa;
+
+  __atomic_fetch_add (&a, b, 0);
+  __atomic_fetch_and (&a, b, 0);
+  __atomic_fetch_or (&a, b, 0);
+  __atomic_fetch_xor (&a, b, 0);
+  
+  return a;
+}
+
+/* { dg-final { scan-assembler-not "atom.b64.add" } } */
+/* { dg-final { scan-assembler-not "atom.b64.and" } } */
+/* { dg-final { scan-assembler-not "atom.b64.or" } } */
+/* { dg-final { scan-assembler-not "atom.b64.xor" } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c
new file mode 100644 (file)
index 0000000..36a83eb
--- /dev/null
@@ -0,0 +1,24 @@
+/* Test the nvptx atomic instructions for __atomic_fetch_OP for
+   SImode arguments.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -m32" } */
+
+int
+main()
+{
+  unsigned long a = ~0;
+  unsigned b = 0xa;
+
+  __atomic_fetch_add (&a, b, 0);
+  __atomic_fetch_and (&a, b, 0);
+  __atomic_fetch_or (&a, b, 0);
+  __atomic_fetch_xor (&a, b, 0);
+  
+  return a;
+}
+
+/* { dg-final { scan-assembler "atom.add.u32" } } */
+/* { dg-final { scan-assembler "atom.b32.and" } } */
+/* { dg-final { scan-assembler "atom.b32.or" } } */
+/* { dg-final { scan-assembler "atom.b32.xor" } } */