Do not connect undriven POs to 1'bx

diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc
index 9374f1ab3586adff3568073b086807351de2fb2b..084107b35f4068dd9d3033f97387f5b02ab62e4a 100644 (file)
--- a/frontends/aiger/aigerparse.cc
+++ b/frontends/aiger/aigerparse.cc
@@ -1005,15 +1005,10 @@ void AigerReader::post_process()
                        if (other_wire) {
                                other_wire->port_input = false;
                                other_wire->port_output = false;
-                       }
-                       if (wire->port_input) {
-                               if (other_wire)
+                               if (wire->port_input)
                                        module->connect(other_wire, SigSpec(wire, i));
-                       }
-                       else {
-                                                                 // Since we skip POs that are connected to Sx,
-                                                                 // re-connect them here
-                               module->connect(SigSpec(wire, i), other_wire ? other_wire : SigSpec(RTLIL::Sx));
+                               else
+                                       module->connect(SigSpec(wire, i), other_wire);
                        }
                }
        }