(define_insn "kmovw"
[(set (match_operand:HI 0 "nonimmediate_operand" "=k,k")
(unspec:HI
- [(match_operand:HI 1 "nonimmediate_operand" "rm,k")]
+ [(match_operand:HI 1 "nonimmediate_operand" "r,km")]
UNSPEC_KMOV))]
"!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512F"
"@
(define_insn "*movhi_internal"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k,rm")
- (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,k,k"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k, r,m")
+ (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,r,km,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
switch (which_alternative)
{
case 4: return "kmovw\t{%k1, %0|%0, %k1}";
- case 5: return "kmovw\t{%1, %0|%0, %1}";
+ case 5: /* FALLTHRU */
+ case 7: return "kmovw\t{%1, %0|%0, %1}";
case 6: return "kmovw\t{%1, %k0|%k0, %1}";
default: gcc_unreachable ();
}
}
}
[(set (attr "type")
- (cond [(eq_attr "alternative" "4,5,6")
+ (cond [(eq_attr "alternative" "4,5,6,7")
(const_string "mskmov")
(match_test "optimize_function_for_size_p (cfun)")
(const_string "imov")
]
(const_string "imov")))
(set (attr "prefix")
- (if_then_else (eq_attr "alternative" "4,5,6")
+ (if_then_else (eq_attr "alternative" "4,5,6,7")
(const_string "vex")
(const_string "orig")))
(set (attr "mode")
--- /dev/null
+/* PR target/70028 */
+/* { dg-do assemble { target avx512bw } } */
+/* { dg-require-effective-target int128 } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-O2 -fno-forward-propagate -mavx512bw -masm=intel" } */
+
+typedef unsigned short A;
+typedef int B __attribute__ ((vector_size (32)));
+typedef unsigned __int128 C;
+typedef __int128 D __attribute__ ((vector_size (32)));
+
+C
+foo (A a, int b, unsigned c, C d, A e, unsigned f, B g, D h)
+{
+ g[1] ^= (A) ~ a;
+ a ^= (unsigned) g[0];
+ h %= (D) h | 1;
+ return a + b + c + d + e + g[0] + g[1] + h[1];
+}