+2013-09-06 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/aarch64/aarch64.md
+ (*madd<mode>): Fix type attribute.
+ (*maddsi_uxtw): Likewise.
+ (*msub<mode>): Likewise.
+ (*msubsi_uxtw): Likewise.
+ (<su_optab>maddsidi4): Likewise.
+ (<su_optab>msubsidi4): Likewise.
+
2013-09-06 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/types.md: Split fdiv<sd> as fsqrt<sd>, fdiv<sd>.
""
"madd\\t%<w>0, %<w>1, %<w>2, %<w>3"
[(set_attr "v8type" "madd")
- (set_attr "type" "mul")
+ (set_attr "type" "mla")
(set_attr "mode" "<MODE>")]
)
""
"madd\\t%w0, %w1, %w2, %w3"
[(set_attr "v8type" "madd")
- (set_attr "type" "mul")
+ (set_attr "type" "mla")
(set_attr "mode" "SI")]
)
""
"msub\\t%<w>0, %<w>1, %<w>2, %<w>3"
[(set_attr "v8type" "madd")
- (set_attr "type" "mul")
+ (set_attr "type" "mla")
(set_attr "mode" "<MODE>")]
)
""
"msub\\t%w0, %w1, %w2, %w3"
[(set_attr "v8type" "madd")
- (set_attr "type" "mul")
+ (set_attr "type" "mla")
(set_attr "mode" "SI")]
)
""
"<su>maddl\\t%0, %w1, %w2, %3"
[(set_attr "v8type" "maddl")
- (set_attr "type" "mul")
+ (set_attr "type" "<su>mlal")
(set_attr "mode" "DI")]
)
""
"<su>msubl\\t%0, %w1, %w2, %3"
[(set_attr "v8type" "maddl")
- (set_attr "type" "mul")
+ (set_attr "type" "<su>mlal")
(set_attr "mode" "DI")]
)