RVTEST_RV64UF
-#define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, testdata, answer ) \
+#define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, tdata, ans ) \
\
- SV_FLW_DATA( f4, ( testdata + 0) , 0) ; \
- SV_FLW_DATA( f5, ( testdata + 4), 0) ; \
- SV_FLW_DATA( f6, ( testdata + 8), 0) ; \
- SV_FLW_DATA( f7, ( testdata + 12), 0) ; \
+ SV_FLW_DATA( f4, ( tdata + 0) , 0) ; \
+ SV_FLW_DATA( f5, ( tdata + 4), 0) ; \
+ SV_FLW_DATA( f6, ( tdata + 8), 0) ; \
+ SV_FLW_DATA( f7, ( tdata + 12), 0) ; \
\
SET_SV_MVL( vl ) ; \
SET_SV_3CSRS( SV_REG_CSR(0, 2, wid1, 2, 1), \
SET_SV_VL(1) ; \
SET_SV_MVL(1) ; \
\
- TEST_SV_FW(0, f2, answer+0, 0) ; \
- TEST_SV_FW(0, f3, answer+4, 0)
+ TEST_SV_FW(0, f2, ans+0, 0) ; \
+ TEST_SV_FW(0, f3, ans+4, 0)
# SV test: vector-vector fadd
#
.float 1.0
.float 2.0
answer:
- .word 0xffff5140 # 42.0 fp16
- .word 0xffff5180 # 44.0 fp16
+ .word 0x51805140 # 44 fp16 42 fp16, tested as-is, even if it goes to fp
+ .word 0x0 # before going to int for comparison (TEST_SV_FW)
testdata2:
- .word 0xffff5120 # 41 fp16
+ .word 0x51405120 # 42 fp16 41 fp16
.word 0xffff5140 # 42 fp16
.float 1.0
.float 2.0
answer2:
- .word 0xffff5140
- .word 0xffff5180
+ .word 0x51805140
+ .word 0x0
# Output data section.
RVTEST_DATA_BEGIN # Start of test output data region.
.align 3