(print_insn_thumb): Likewise.
* h8500-dis.c (print_insn_h8500): Constify "opcode".
* mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
* ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
type-punned pointer warnings.
<case 'L'>: Likewise. Fix error message too.
* pdp11-dis.c (print_reg): Warning fix.
* sh-dis.c (print_movxy): Constify "op" param.
(print_insn_ddt): Constify sh_opcode_info vars.
(print_insn_ppi): Likewise.
(print_insn_sh): Likewise.
* tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
type-punned pointer warnings.
* w65-dis.c (print_insn_w65): Constify "op".
+2002-12-02 Alan Modra <amodra@bigpond.net.au>
+
+ * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
+ (print_insn_thumb): Likewise.
+ * h8500-dis.c (print_insn_h8500): Constify "opcode".
+ * mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
+ * ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
+ type-punned pointer warnings.
+ <case 'L'>: Likewise. Fix error message too.
+ * pdp11-dis.c (print_reg): Warning fix.
+ * sh-dis.c (print_movxy): Constify "op" param.
+ (print_insn_ddt): Constify sh_opcode_info vars.
+ (print_insn_ppi): Likewise.
+ (print_insn_sh): Likewise.
+ * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
+ type-punned pointer warnings.
+ * w65-dis.c (print_insn_w65): Constify "op".
+
2002-12-01 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-dis.c (PC_REGNUM): Define.
static int
print_insn_arm (pc, info, given)
- bfd_vma pc;
- struct disassemble_info * info;
- long given;
+ bfd_vma pc;
+ struct disassemble_info *info;
+ long given;
{
- struct arm_opcode * insn;
- void * stream = info->stream;
- fprintf_ftype func = info->fprintf_func;
+ const struct arm_opcode *insn;
+ void *stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
for (insn = arm_opcodes; insn->assembler; insn++)
{
static int
print_insn_thumb (pc, info, given)
- bfd_vma pc;
- struct disassemble_info * info;
- long given;
+ bfd_vma pc;
+ struct disassemble_info *info;
+ long given;
{
- struct thumb_opcode * insn;
- void * stream = info->stream;
- fprintf_ftype func = info->fprintf_func;
+ const struct thumb_opcode *insn;
+ void *stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
for (insn = thumb_opcodes; insn->assembler; insn++)
{
/* Disassemble h8500 instructions.
- Copyright 1993, 1998, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1993, 1998, 2000, 2001, 2002 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
bfd_vma addr;
disassemble_info *info;
{
- h8500_opcode_info *opcode;
+ const h8500_opcode_info *opcode;
void *stream = info->stream;
fprintf_ftype func = info->fprintf_func;
/* Disassemble Motorola M*Core instructions.
- Copyright 1993, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1993, 1999, 2000, 2002 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
bfd_vma memaddr;
struct disassemble_info *info;
{
- unsigned char ibytes[4];
- fprintf_ftype fprintf = info->fprintf_func;
- void * stream = info->stream;
- unsigned short inst;
- mcore_opcode_info * op;
- int status;
+ unsigned char ibytes[4];
+ fprintf_ftype fprintf = info->fprintf_func;
+ void *stream = info->stream;
+ unsigned short inst;
+ const mcore_opcode_info *op;
+ int status;
info->bytes_per_chunk = 2;
switch (op->opclass)
{
- case O0: break;
- case OT: fprintf (stream, "\t%d", inst & 0x3); break;
+ case O0:
+ break;
+
+ case OT:
+ fprintf (stream, "\t%d", inst & 0x3);
+ break;
+
case O1:
case JMP:
- case JSR: fprintf (stream, "\t%s", name); break;
- case OC: fprintf (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]); break;
- case O1R1: fprintf (stream, "\t%s, r1", name); break;
+ case JSR:
+ fprintf (stream, "\t%s", name);
+ break;
+
+ case OC:
+ fprintf (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]);
+ break;
+
+ case O1R1:
+ fprintf (stream, "\t%s, r1", name);
+ break;
+
case MULSH:
- case O2: fprintf (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]); break;
- case X1: fprintf (stream, "\tr1, %s", name); break;
- case OI: fprintf (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1); break;
- case RM: fprintf (stream, "\t%s-r15, (r0)", name); break;
- case RQ: fprintf (stream, "\tr4-r7, (%s)", name); break;
+ case O2:
+ fprintf (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]);
+ break;
+
+ case X1:
+ fprintf (stream, "\tr1, %s", name);
+ break;
+
+ case OI:
+ fprintf (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1);
+ break;
+
+ case RM:
+ fprintf (stream, "\t%s-r15, (r0)", name);
+ break;
+
+ case RQ:
+ fprintf (stream, "\tr4-r7, (%s)", name);
+ break;
+
case OB:
case OBRa:
case OBRb:
case SIa:
case OMa:
case OMb:
- case OMc: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x1F); break;
- case I7: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x7F); break;
- case LS: fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
- name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
+ case OMc:
+ fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x1F);
+ break;
+
+ case I7:
+ fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x7F);
+ break;
+
+ case LS:
+ fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
+ name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
break;
case BR:
/* Print National Semiconductor 32000 instructions.
- Copyright 1986, 1988, 1991, 1992, 1994, 1998, 2001
+ Copyright 1986, 1988, 1991, 1992, 1994, 1998, 2001, 2002
Free Software Foundation, Inc.
This file is part of opcodes library.
char *result;
int index_offset;
{
- int addr_mode;
- float Fvalue;
- double Lvalue;
+ union {
+ float f;
+ double d;
+ int i[2];
+ } value;
int Ivalue;
+ int addr_mode;
int disp1, disp2;
int index;
int size;
sprintf (result, "$%d", Ivalue);
break;
case 'F':
- bit_copy (buffer, *aoffsetp, 32, (char *) &Fvalue);
- flip_bytes ((char *) & Fvalue, 4);
+ bit_copy (buffer, *aoffsetp, 32, (char *) &value.f);
+ flip_bytes ((char *) &value.f, 4);
*aoffsetp += 32;
- if (INVALID_FLOAT (&Fvalue, 4))
- sprintf (result, "<<invalid float 0x%.8x>>", *(int *) &Fvalue);
+ if (INVALID_FLOAT (&value.f, 4))
+ sprintf (result, "<<invalid float 0x%.8x>>", value.i[0]);
else /* assume host has ieee float */
- sprintf (result, "$%g", Fvalue);
+ sprintf (result, "$%g", value.f);
break;
case 'L':
- bit_copy (buffer, *aoffsetp, 64, (char *) &Lvalue);
- flip_bytes ((char *) & Lvalue, 8);
+ bit_copy (buffer, *aoffsetp, 64, (char *) &value.d);
+ flip_bytes ((char *) &value.d, 8);
*aoffsetp += 64;
- if (INVALID_FLOAT (&Lvalue, 8))
- sprintf (result, "<<invalid long 0x%.8x%.8x>>",
- *(((int *) &Lvalue) + 1), *(int *) &Lvalue);
+ if (INVALID_FLOAT (&value.d, 8))
+ sprintf (result, "<<invalid double 0x%.8x%.8x>>",
+ value.i[1], value.i[0]);
else /* assume host has ieee float */
- sprintf (result, "$%g", Lvalue);
+ sprintf (result, "$%g", value.d);
break;
}
break;
FPRINTF (F, "r%d", reg); break;
case 6: FPRINTF (F, "sp"); break;
case 7: FPRINTF (F, "pc"); break;
- default: /* error */
+ default: ; /* error */
}
}
#endif
static void print_movxy
- PARAMS ((sh_opcode_info *, int, int, fprintf_ftype, void *));
+ PARAMS ((const sh_opcode_info *, int, int, fprintf_ftype, void *));
static void print_insn_ddt PARAMS ((int, struct disassemble_info *));
static void print_dsp_reg PARAMS ((int, fprintf_ftype, void *));
static void print_insn_ppi PARAMS ((int, struct disassemble_info *));
static void
print_movxy (op, rn, rm, fprintf_fn, stream)
- sh_opcode_info *op;
+ const sh_opcode_info *op;
int rn, rm;
fprintf_ftype fprintf_fn;
void *stream;
fprintf_fn (stream, ".word 0x%x", insn);
else
{
- static sh_opcode_info *first_movx, *first_movy;
- sh_opcode_info *opx, *opy;
+ static const sh_opcode_info *first_movx, *first_movy;
+ const sh_opcode_info *opx, *opy;
unsigned int insn_x, insn_y;
if (! first_movx)
void *stream = info->stream;
unsigned int nib1, nib2, nib3;
char *dc = NULL;
- sh_opcode_info *op;
+ const sh_opcode_info *op;
if ((field_b & 0xe800) == 0)
{
unsigned char nibs[4];
int status;
bfd_vma relmask = ~(bfd_vma) 0;
- sh_opcode_info *op;
+ const sh_opcode_info *op;
int target_arch;
switch (info->mach)
/* Disassembly routines for TMS320C30 architecture
- Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
This program is free software; you can redistribute it and/or modify
float *ieeefloat;
{
unsigned long exp, sign, mant;
+ union {
+ unsigned long l;
+ float f;
+ } val;
if (size == 2)
{
if (tmsfloat == 0x80000000)
sign = mant = exp = 0;
tmsfloat = sign | exp | mant;
- *ieeefloat = *((float *) &tmsfloat);
+ val.l = tmsfloat;
+ *ieeefloat = val.f;
return 1;
}
/* Disassemble WDC 65816 instructions.
- Copyright 1995, 1998, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1995, 1998, 2000, 2001, 2002 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
{
int status = 0;
unsigned char insn[4];
- register struct opinfo *op;
+ const struct opinfo *op;
int i;
int X = 0;
int M = 0;