spe.md (spe_evneg): Rename to negv2si2.

	* config/rs6000/spe.md (spe_evneg): Rename to negv2si2.

	* config/rs6000/rs6000.c (bdesc_1arg): Change spe_evneg to
	negv2si2.

From-SVN: r81724

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1b8c1d49c50b60ee3e2d533e10fb30404ba18b21..8ba2aed5c3de241c0aa3bfcdceb6242a1c3671c7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-05-11  Aldy Hernandez  <aldyh@redhat.com>
+
+       * config/rs6000/spe.md (spe_evneg): Rename to negv2si2.
+
+       * config/rs6000/rs6000.c (bdesc_1arg): Change spe_evneg to
+       negv2si2.
+
 2004-05-11  Aldy Hernandez  <aldyh@redhat.com>
 
        * doc/md.texi (Standard Names): Fix typo in vec_init description.

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index aaa93ecb00c8c8311681fa7b6ebbf2e969e34bb8..235e704014ad8b51ed7801043d2711b1f284b177 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5719,7 +5719,7 @@ static struct builtin_description bdesc_1arg[] =
   { 0, CODE_FOR_spe_evfsnabs, "__builtin_spe_evfsnabs", SPE_BUILTIN_EVFSNABS },
   { 0, CODE_FOR_spe_evfsneg, "__builtin_spe_evfsneg", SPE_BUILTIN_EVFSNEG },
   { 0, CODE_FOR_spe_evmra, "__builtin_spe_evmra", SPE_BUILTIN_EVMRA },
-  { 0, CODE_FOR_spe_evneg, "__builtin_spe_evneg", SPE_BUILTIN_EVNEG },
+  { 0, CODE_FOR_negv2si2, "__builtin_spe_evneg", SPE_BUILTIN_EVNEG },
   { 0, CODE_FOR_spe_evrndw, "__builtin_spe_evrndw", SPE_BUILTIN_EVRNDW },
   { 0, CODE_FOR_spe_evsubfsmiaaw, "__builtin_spe_evsubfsmiaaw", SPE_BUILTIN_EVSUBFSMIAAW },
   { 0, CODE_FOR_spe_evsubfssiaaw, "__builtin_spe_evsubfssiaaw", SPE_BUILTIN_EVSUBFSSIAAW },

diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md
index f8f6c0af7a4915143a9c788bbf8f650fa69dd13b..4b311c70fee3aa9755953a436e552784bc78c8ce 100644 (file)
--- a/gcc/config/rs6000/spe.md
+++ b/gcc/config/rs6000/spe.md
@@ -443,7 +443,7 @@
   [(set_attr "type" "vecsimple")
    (set_attr  "length" "4")])
 
-(define_insn "spe_evneg"
+(define_insn "negv2si2"
   [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
         (neg:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
   "TARGET_SPE"