Merge branch 'origin' into crestline

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index cac4d86d3ab40e3136c2f748f65167cb655950a6..9ee81b8725d4f17a306e08de5e0742595a006833 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -505,8 +505,8 @@ struct brw_context
 
    /* Active vertex program: 
     */
-   struct gl_vertex_program *vertex_program;
-   struct gl_fragment_program *fragment_program;
+   const struct gl_vertex_program *vertex_program;
+   const struct gl_fragment_program *fragment_program;
 
 
    /* For populating the gtt:

diff --git a/src/mesa/drivers/dri/i965/brw_metaops.c b/src/mesa/drivers/dri/i965/brw_metaops.c
index 2deec5eae3d0b31b90ce8b1aecc90a4277976a9d..acd1d5819175a6ab6684812a6670b7fa46840394 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_metaops.c
+++ b/src/mesa/drivers/dri/i965/brw_metaops.c
@@ -492,8 +492,7 @@ static void meta_draw_quad(struct intel_context *intel,
 }
 
 
-static void install_meta_state( struct intel_context *intel,
-                               GLenum state )
+static void install_meta_state( struct intel_context *intel )
 {
    GLcontext *ctx = &intel->ctx;
    struct brw_context *brw = brw_context(ctx);

diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
index b7893ca3e550ab625ffae1207ffc84c18b266177..82c1958887f00ae05df28dbf01d9eadb10473cc1 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
@@ -114,7 +114,7 @@ static GLuint translate_texgen( GLboolean enabled, GLenum mode )
 static void make_state_key( GLcontext *ctx, struct state_key *key )
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_fragment_program *fp = brw->fragment_program;
+   const struct gl_fragment_program *fp = brw->fragment_program;
    GLuint i;
 
    /* This now relies on texenvprogram.c being active:
@@ -1628,7 +1628,7 @@ const struct brw_tracked_state brw_tnl_vertprog = {
 
 static void update_active_vertprog( struct brw_context *brw )
 {
-   struct gl_vertex_program *prev = brw->vertex_program;
+   const struct gl_vertex_program *prev = brw->vertex_program;
 
    /* NEW_PROGRAM */
    if (brw->attribs.VertexProgram->_Enabled) {

diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index e41042d6d27345d95950d49b4ad3546e219bc53f..ff5cb31bdd148fb749c9b5b14aa2a25525482f18 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -122,7 +122,7 @@ static void upload_wm_unit(struct brw_context *brw )
 
    /* BRW_NEW_FRAGMENT_PROGRAM */
    {
-      struct gl_fragment_program *fp = brw->fragment_program; 
+      const struct gl_fragment_program *fp = brw->fragment_program; 
 
       if (fp->Base.InputsRead & (1<<FRAG_ATTRIB_WPOS)) 
         wm.wm5.program_uses_depth = 1; /* as far as we can tell */

diff --git a/src/mesa/drivers/dri/i965/bufmgr_fake.c b/src/mesa/drivers/dri/i965/bufmgr_fake.c
index 205dc722c0692266d30d2547658ae2fd852f1a2b..24ee11edd8c20f58d60495f14dc46541feec935a 100644 (file)
--- a/src/mesa/drivers/dri/i965/bufmgr_fake.c
+++ b/src/mesa/drivers/dri/i965/bufmgr_fake.c
@@ -1329,9 +1329,11 @@ unsigned bmSetFence( struct intel_context *intel )
 
 unsigned bmSetFenceLock( struct intel_context *intel )
 {
+  unsigned last;
   LOCK(intel->bm);
-  bmSetFence(intel);
+  last = bmSetFence(intel);
   UNLOCK(intel->bm);
+  return last;
 }
 unsigned bmLockAndFence( struct intel_context *intel )
 {

diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index 9acafe5310e17774c3f7fbf1b7fd27b0c1f6326a..0daa0ecb7e11a4c7d38b8a2fa768a7b66103d038 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -33,6 +33,7 @@
 #include "extensions.h"
 #include "framebuffer.h"
 #include "imports.h"
+#include "points.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -118,6 +119,9 @@ static const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
       case PCI_CHIP_I946_GZ:
         chipset = "Intel(R) 946GZ"; break;
          break;
+      case PCI_CHIP_CRESTLINE:
+        chipset = "Intel(R) Crestline"; break;
+         break;
       default:
         chipset = "Unknown Intel Chipset"; break;
       }
@@ -158,7 +162,6 @@ const struct dri_extension card_extensions[] =
     { "GL_ARB_vertex_buffer_object",       GL_ARB_vertex_buffer_object_functions },
     { "GL_ARB_vertex_program",             GL_ARB_vertex_program_functions },
     { "GL_ARB_window_pos",                 GL_ARB_window_pos_functions },
-    { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
     { "GL_EXT_blend_color",                GL_EXT_blend_color_functions },
     { "GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions },
     { "GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions },
@@ -184,7 +187,8 @@ const struct dri_extension card_extensions[] =
     { NULL,                                NULL }
 };
 
-
+static const struct dri_extension arb_oc_extension = 
+    { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions};
 
 static const struct dri_debug_control debug_control[] =
 {
@@ -412,6 +416,9 @@ GLboolean intelInitContext( struct intel_context *intel,
    driInitExtensions( ctx, card_extensions, 
                      GL_TRUE );
 
+   if (intel->intelScreen->drmMinor >= 8)
+      driInitSingleExtension (ctx, &arb_oc_extension);
+
    INTEL_DEBUG  = driParseDebugString( getenv( "INTEL_DEBUG" ),
                                       debug_control );
 

diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index fe7ee382a195751436a6613346a06502cc2746fb..39eb775301747747d1d2ccb3ca664173c086c492 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -384,6 +384,7 @@ extern int INTEL_DEBUG;
 #define PCI_CHIP_I965_Q                        0x2992
 #define PCI_CHIP_I965_G_1              0x2982
 #define PCI_CHIP_I946_GZ               0x2972
+#define PCI_CHIP_CRESTLINE             0x2A02
 
 
 /* ================================================================