tc->setIntReg(16, cpuId);
tc->setIntReg(0, cpuId);
- AlphaFault *reset = new ResetFault;
+ Addr base = tc->readMiscRegNoEffect(IPR_PAL_BASE);
+ Addr offset = ResetFault().vect();
- tc->pcState(tc->readMiscRegNoEffect(IPR_PAL_BASE) + reset->vect());
+ tc->pcState(base + offset);
- delete reset;
+ tc->activate();
}
////////////////////////////////////////////////////////////////////////
// Alpha IPR register accessors
inline bool PcPAL(Addr addr) { return addr & 0x3; }
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{ tc->activate(); }
////////////////////////////////////////////////////////////////////////
//
// FPEXC.EN = 0
- static Fault reset = std::make_shared<Reset>();
- reset->invoke(tc);
+ Reset().invoke(tc);
+ tc->activate();
}
uint64_t
}
}
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{
- tc->activate();
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
static inline void
}
void
-startupCPU(ThreadContext *tc, int cpuId)
+initCPU(ThreadContext *tc, int cpuId)
{
tc->activate();
}
-void
-initCPU(ThreadContext *tc, int cpuId)
-{}
-
void
copyRegs(ThreadContext *src, ThreadContext *dest)
{
//
// CPU Utility
//
-void startupCPU(ThreadContext *tc, int cpuId);
void initCPU(ThreadContext *tc, int cpuId);
void copyRegs(ThreadContext *src, ThreadContext *dest);
#include "base/types.hh"
#include "cpu/thread_context.hh"
-namespace NullISA {
+namespace NullISA
+{
-inline uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size,
- bool fp) { return 0; }
+static inline uint64_t
+getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
+{
+ return 0;
+}
inline void initCPU(ThreadContext *tc, int cpuId) {}
-inline void startupCPU(ThreadContext *tc, int cpuId) {}
}
return retPC;
}
-inline void
-startupCPU(ThreadContext *tc, int cpuId)
-{
- tc->activate();
-}
-
-void
-copyRegs(ThreadContext *src, ThreadContext *dest);
+void copyRegs(ThreadContext *src, ThreadContext *dest);
static inline void
copyMiscRegs(ThreadContext *src, ThreadContext *dest)
void initCPU(ThreadContext *tc, int cpuId)
{
- static Fault reset = std::make_shared<Reset>();
- reset->invoke(tc);
+ Reset().invoke(tc);
+ tc->activate();
}
-}
\ No newline at end of file
+}
return 0;
}
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{
- tc->activate();
-}
-
inline void
copyRegs(ThreadContext *src, ThreadContext *dest)
{
class PowerOnReset : public SparcFault<PowerOnReset>
{
- void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+ public:
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
};
void
initCPU(ThreadContext *tc, int cpuId)
{
- static Fault por = std::make_shared<PowerOnReset>();
- if (cpuId == 0)
- por->invoke(tc);
+ // Other CPUs will get activated by IPIs.
+ if (cpuId != 0)
+ return;
+
+ PowerOnReset().invoke(tc);
+ tc->activate();
}
} // namespace SPARC_ISA
void initCPU(ThreadContext *tc, int cpuId);
-inline void
-startupCPU(ThreadContext *tc, int cpuId)
-{
- // Other CPUs will get activated by IPIs
- if (cpuId == 0 || !FullSystem)
- tc->activate();
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
initCPU(ThreadContext *tc, int cpuId)
{
InitInterrupt(0).invoke(tc);
-}
-void startupCPU(ThreadContext *tc, int cpuId)
-{
- if (cpuId == 0 || !FullSystem) {
+ if (cpuId == 0) {
tc->activate();
} else {
// This is an application processor (AP). It should be initialized to
void initCPU(ThreadContext *tc, int cpuId);
- void startupCPU(ThreadContext *tc, int cpuId);
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
System::initState()
{
if (FullSystem) {
- for (auto *tc: threadContexts) {
+ for (auto *tc: threadContexts)
TheISA::initCPU(tc, tc->contextId());
- TheISA::startupCPU(tc, tc->contextId());
- }
// Moved from the constructor to here since it relies on the
// address map being resolved in the interconnect
/**