added english language description for lwzupx instruction in the pifixedload.mdwm

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index f75285033cd7d616eb94ec03225d3fa96e91298d..748b098e274c73f3492c3c9b612e424b1716a19e 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -202,6 +202,16 @@ Pseudo-code:
     RT <- [0] * 32 || MEM(EA, 4)
     RA <- (RA) + (RB)
 
+Description:
+
+    Let the effective address (EA) be the register RA.
+    The halfword in storage addressed by EA is loaded into RT[48:63].
+    RT[0:47] are filled with a copy of bit 0 of the loaded halfword.
+
+    The sum (RA) + (RB) is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None