--- /dev/null
+target:
+ .word 0
+ # Given how the LoongArch encoding space is apparently centrally-
+ # managed and sequentially allocated in chunks of prefixes, it is
+ # highly unlikely this would become a valid LoongArch instruction in
+ # the foreseeable future.
+ .word 0xfeedf00d
Disassembly of section .data:
00000000.* <L1-0x5>:
-[ ]+0:[ ]+80030201[ ]+0x80030201
+[ ]+0:[ ]+80030201[ ]+\.word[ ]+0x80030201
[ ]+3:[ ]+R_LARCH_ADD_ULEB128[ ]+L2
[ ]+3:[ ]+R_LARCH_SUB_ULEB128[ ]+L1
[ ]+\.\.\.
0000000000000005[ ]+<L1>:
[ ]+\.\.\.
-[ ]+81:[ ]+ff040000[ ]+0xff040000
+[ ]+81:[ ]+ff040000[ ]+\.word[ ]+0xff040000
[ ]+85:[ ]+cacop[ ]+0x1f,[ ]+\$t3,[ ]+1
0000000000000086[ ]+<L2>:
-[ ]+86:[ ]+07060005[ ]+0x07060005
-[ ]+8a:[ ]+0x00008080
+[ ]+86:[ ]+07060005[ ]+\.word[ ]+0x07060005
+[ ]+8a:[ ]+\.word[ ]+0x00008080
[ ]+8a:[ ]+R_LARCH_ADD_ULEB128[ ]+L4
[ ]+8a:[ ]+R_LARCH_SUB_ULEB128[ ]+L3
000000000000008d[ ]+<L3>:
[ ]+\.\.\.
-[ ]+4089:[ ]+ff080000[ ]+0xff080000
-[ ]+408d:[ ]+0x09ffffff
+[ ]+4089:[ ]+ff080000[ ]+\.word[ ]+0xff080000
+[ ]+408d:[ ]+\.word[ ]+0x09ffffff
0000000000004090[ ]+<L4>:
-[ ]+4090:[ ]+09090909[ ]+0x09090909
-[ ]+4094:[ ]+09090909[ ]+0x09090909
-[ ]+4098:[ ]+09090909[ ]+0x09090909
-[ ]+409c:[ ]+09090909[ ]+0x09090909
+[ ]+4090:[ ]+09090909[ ]+\.word[ ]+0x09090909
+[ ]+4094:[ ]+09090909[ ]+\.word[ ]+0x09090909
+[ ]+4098:[ ]+09090909[ ]+\.word[ ]+0x09090909
+[ ]+409c:[ ]+09090909[ ]+\.word[ ]+0x09090909
if (!opc)
{
info->insn_type = dis_noninsn;
+ info->fprintf_styled_func (info->stream, dis_style_assembler_directive, ".word\t\t");
info->fprintf_styled_func (info->stream, dis_style_immediate, "0x%08x", insn);
return;
}