added english language description for lbzsx instruction
authorShriya Sharma <shriya@redsemiconductor.com>
Fri, 27 Oct 2023 10:20:00 +0000 (11:20 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 Dec 2023 19:26:21 +0000 (19:26 +0000)
openpower/isa/fixedloadshift.mdwn

index c2b22985f006a560e4101e04bced282c2481ac11..481547c9bcb626f0877d9ae57ea029e00c1826b6 100644 (file)
@@ -38,6 +38,14 @@ Pseudo-code:
     EA <- b + (RB) << (SH+1)
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA|0).
+    The byte in storage addressed by EA is loaded into
+    RT[56:63]. RT[0:55] are set to 0.
+
+
 Special Registers Altered:
 
     None