gallium/drivers: handle TGSI_OPCODE_CEIL
authorChristoph Bumiller <e0425955@student.tuwien.ac.at>
Sat, 5 May 2012 12:36:40 +0000 (14:36 +0200)
committerChristoph Bumiller <e0425955@student.tuwien.ac.at>
Wed, 9 May 2012 15:09:30 +0000 (17:09 +0200)
src/gallium/drivers/i915/i915_fpc_translate.c
src/gallium/drivers/nv30/nvfx_fragprog.c
src/gallium/drivers/nv30/nvfx_vertprog.c
src/gallium/drivers/r600/r600_asm.c

index 94c0c69fcae09356cb372cae1ff4259291306897..def9a03d3773e99d34c1063da8f9a84d3cd6f4c3 100644 (file)
@@ -512,6 +512,22 @@ i915_translate_instruction(struct i915_fp_compile *p,
       emit_simple_arith(p, inst, A0_ADD, 2, fs);
       break;
 
+   case TGSI_OPCODE_CEIL:
+      src0 = src_vector(p, &inst->Src[0], fs);
+      tmp = i915_get_utemp(p);
+      flags = get_result_flags(inst);
+      i915_emit_arith(p,
+                      A0_FLR,
+                      tmp,
+                      flags & A0_DEST_CHANNEL_ALL, 0,
+                      negate(src0, 1, 1, 1, 1), 0, 0);
+      i915_emit_arith(p,
+                      A0_MOV,
+                      get_result_vector(p, &inst->Dst[0]),
+                      flags, 0,
+                      negate(tmp, 1, 1, 1, 1), 0, 0);
+      break;
+
    case TGSI_OPCODE_CMP:
       src0 = src_vector(p, &inst->Src[0], fs);
       src1 = src_vector(p, &inst->Src[1], fs);
index e562b454f92696465cd4cfc0b8c308b2b9560b1e..592ad21c6c89154cd72a00e0be93b2e18b37de8f 100644 (file)
@@ -535,6 +535,11 @@ nvfx_fragprog_parse_instruction(struct nv30_context* nvfx, struct nvfx_fpc *fpc,
    case TGSI_OPCODE_ADD:
       nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none));
       break;
+   case TGSI_OPCODE_CEIL:
+      tmp = nvfx_src(temp(fpc));
+      nvfx_fp_emit(fpc, arith(0, FLR, tmp.reg, mask, neg(src[0]), none, none));
+      nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, neg(tmp), none, none));
+      break;
    case TGSI_OPCODE_CMP:
       insn = arith(0, MOV, none.reg, mask, src[0], none, none);
       insn.cc_update = 1;
index d7eb9fb0a6399741ced2ee4d34d2e9bbea7c4b35..82972b3943cf9ac0784b663d9a382c5272b84211 100644 (file)
@@ -550,6 +550,11 @@ nvfx_vertprog_parse_instruction(struct nv30_context *nv30, struct nvfx_vpc *vpc,
    case TGSI_OPCODE_ARL:
       nvfx_vp_emit(vpc, arith(0, VEC, ARL, dst, mask, src[0], none, none));
       break;
+   case TGSI_OPCODE_CEIL:
+      tmp = nvfx_src(temp(vpc));
+      nvfx_vp_emit(vpc, arith(0, VEC, FLR, tmp.reg, mask, neg(src[0]), none, none));
+      nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, neg(tmp), none, none));
+      break;
    case TGSI_OPCODE_CMP:
       insn = arith(0, VEC, MOV, none.reg, mask, src[0], none, none);
       insn.cc_update = 1;
index 0d67fbd6a0466db0c8bcf7bb126657cb1c6f635f..5a10bd90776f14dd4c85a93a9774f1146adaf496 100644 (file)
@@ -94,6 +94,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
+               case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
@@ -172,6 +173,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
+               case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE: