int internalFormat;
} image[GAMMA_TEX_MAXLEVELS];
- int32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS];
- int32_t TextureAddressMode;
- int32_t TextureColorMode;
- int32_t TextureFilterMode;
- int32_t TextureFormat;
- int32_t TextureReadMode;
- int32_t TextureBorderColor;
+ uint32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS];
+ uint32_t TextureAddressMode;
+ uint32_t TextureColorMode;
+ uint32_t TextureFilterMode;
+ uint32_t TextureFormat;
+ uint32_t TextureReadMode;
+ uint32_t TextureBorderColor;
};
#define GAMMA_NO_PALETTE 0x0
unsigned int lastStamp;
- int32_t ClearColor;
- int32_t Color;
- int32_t DitherMode;
- int32_t ClearDepth;
- int32_t FogMode;
- int32_t AreaStippleMode;
- int32_t LBReadFormat;
- int32_t LBWriteFormat;
- int32_t LineMode;
- int32_t PointMode;
- int32_t TriangleMode;
- int32_t AntialiasMode;
+ uint32_t ClearColor;
+ uint32_t Color;
+ uint32_t DitherMode;
+ uint32_t ClearDepth;
+ uint32_t FogMode;
+ uint32_t AreaStippleMode;
+ uint32_t LBReadFormat;
+ uint32_t LBWriteFormat;
+ uint32_t LineMode;
+ uint32_t PointMode;
+ uint32_t TriangleMode;
+ uint32_t AntialiasMode;
GLfloat ViewportScaleX;
GLfloat ViewportScaleY;
GLfloat ViewportScaleZ;
WRITEF(gmesa->buf, Tr4, tc0[i][2]);
WRITEF(gmesa->buf, Tt4, tc0[i][0]);
WRITEF(gmesa->buf, Ts4, tc0[i][1]);
- WRITE(gmesa->buf, PackedColor4, *(int32_t*)col[i]);
+ WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]);
WRITEF(gmesa->buf, Vw, coord[i][3]);
WRITEF(gmesa->buf, Vz, coord[i][2]);
WRITEF(gmesa->buf, Vy, coord[i][1]);
CHECK_DMA_BUFFER(gmesa, 7);
WRITEF(gmesa->buf, Tt2, tc0[i][0]);
WRITEF(gmesa->buf, Ts2, tc0[i][1]);
- WRITE(gmesa->buf, PackedColor4, *(int32_t*)col[i]);
+ WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]);
WRITEF(gmesa->buf, Vw, coord[i][3]);
WRITEF(gmesa->buf, Vz, coord[i][2]);
WRITEF(gmesa->buf, Vy, coord[i][1]);
} else {
for (i=start; i < end; i++) {
CHECK_DMA_BUFFER(gmesa, 4);
- WRITE(gmesa->buf, PackedColor4, *(int32_t*)col[i]);
+ WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]);
WRITEF(gmesa->buf, Vz, coord[i][2]);
WRITEF(gmesa->buf, Vy, coord[i][1]);
WRITEF(gmesa->buf, Vx3, coord[i][0]);
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
gammaScreenPtr gammascrn = gmesa->gammaScreen;
- int32_t dwords1, dwords2, i = 0;
+ uint32_t dwords1, dwords2, i = 0;
char *src = (char *)rgba[0];
GLuint read = n * gammascrn->cpp; /* Number of bytes we are expecting */
- int32_t data;
+ uint32_t data;
FLUSH_DMA_BUFFER(gmesa);
CHECK_DMA_BUFFER(gmesa, 16);
moredata:
- dwords1 = *(volatile int32_t*)(void *)(((int8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords));
- dwords2 = *(volatile int32_t*)(void *)(((int8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords));
+ dwords1 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords));
+ dwords2 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords));
if (dwords1) {
memcpy(src, (char*)gammascrn->regions[1].map + 0x1000, dwords1 << 2);
static void gammaUpdateAlphaMode( GLcontext *ctx )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t a = gmesa->AlphaTestMode;
- int32_t b = gmesa->AlphaBlendMode;
- int32_t f = gmesa->AB_FBReadMode_Save = 0;
+ uint32_t a = gmesa->AlphaTestMode;
+ uint32_t b = gmesa->AlphaBlendMode;
+ uint32_t f = gmesa->AB_FBReadMode_Save = 0;
GLubyte refByte = (GLint) (ctx->Color.AlphaRef * 255.0);
a &= ~(AT_CompareMask | AT_RefValueMask);
static void gammaUpdateZMode( GLcontext *ctx )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t z = gmesa->DepthMode;
- int32_t delta = gmesa->DeltaMode;
- int32_t window = gmesa->Window;
- int32_t lbread = gmesa->LBReadMode;
+ uint32_t z = gmesa->DepthMode;
+ uint32_t delta = gmesa->DeltaMode;
+ uint32_t window = gmesa->Window;
+ uint32_t lbread = gmesa->LBReadMode;
z &= ~DM_CompareMask;
static void gammaUpdateFogAttrib( GLcontext *ctx )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t f = gmesa->FogMode;
- int32_t g = gmesa->GeometryMode;
- int32_t d = gmesa->DeltaMode;
+ uint32_t f = gmesa->FogMode;
+ uint32_t g = gmesa->GeometryMode;
+ uint32_t d = gmesa->DeltaMode;
if (ctx->Fog.Enabled) {
f |= FogModeEnable;
static void gammaUpdatePolygon( GLcontext *ctx )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t g = gmesa->GeometryMode;
+ uint32_t g = gmesa->GeometryMode;
g &= ~(GM_PolyOffsetFillEnable | GM_PolyOffsetPointEnable |
GM_PolyOffsetLineEnable);
static void gammaUpdateCull( GLcontext *ctx )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t g = gmesa->GeometryMode;
+ uint32_t g = gmesa->GeometryMode;
g &= ~(GM_PolyCullMask | GM_FFMask);
static void gammaDDShadeModel( GLcontext *ctx, GLenum mode )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
- int32_t g = gmesa->GeometryMode;
- int32_t c = gmesa->ColorDDAMode;
+ uint32_t g = gmesa->GeometryMode;
+ uint32_t c = gmesa->ColorDDAMode;
g &= ~GM_ShadingMask;
c &= ~ColorDDAShadingMask;
case GL_DITHER:
do {
- int32_t d = gmesa->DitherMode;
+ uint32_t d = gmesa->DitherMode;
FLUSH_BATCH( gmesa );
if ( state ) {
#if ENABLELIGHTING
case GL_LIGHTING:
do {
- int32_t l = gmesa->LightingMode;
+ uint32_t l = gmesa->LightingMode;
FLUSH_BATCH( gmesa );
if ( state ) {
case GL_COLOR_MATERIAL:
do {
- int32_t m = gmesa->MaterialMode;
+ uint32_t m = gmesa->MaterialMode;
FLUSH_BATCH( gmesa );
if ( state ) {
static void gammaSetTexWrapping(gammaTextureObjectPtr t,
GLenum wraps, GLenum wrapt)
{
- int32_t t1 = t->TextureAddressMode;
- int32_t t2 = t->TextureReadMode;
+ uint32_t t1 = t->TextureAddressMode;
+ uint32_t t2 = t->TextureReadMode;
t1 &= ~(TAM_SWrap_Mask | TAM_TWrap_Mask);
t2 &= ~(TRM_UWrap_Mask | TRM_VWrap_Mask);
GLenum minf, GLenum magf,
GLfloat bias)
{
- int32_t t1 = t->TextureAddressMode;
- int32_t t2 = t->TextureReadMode;
+ uint32_t t1 = t->TextureAddressMode;
+ uint32_t t2 = t->TextureReadMode;
t2 &= ~(TRM_Mag_Mask | TRM_Min_Mask);
static void TAG(gamma_point)( gammaContextPtr gmesa,
const gammaVertex *v0 )
{
- int32_t vColor;
- int32_t vBegin;
+ uint32_t vColor;
+ uint32_t vBegin;
vBegin = gmesa->Begin | B_PrimType_Points;
const gammaVertex *v0,
const gammaVertex *v1 )
{
- int32_t vColor;
- int32_t vBegin;
+ uint32_t vColor;
+ uint32_t vBegin;
vBegin = gmesa->Begin | B_PrimType_Lines;
const gammaVertex *v1,
const gammaVertex *v2 )
{
- int32_t vColor;
- int32_t vBegin;
+ uint32_t vColor;
+ uint32_t vBegin;
vBegin = gmesa->Begin | B_PrimType_Triangles;
const gammaVertex *v2,
const gammaVertex *v3 )
{
- int32_t vColor;
- int32_t vBegin;
+ uint32_t vColor;
+ uint32_t vBegin;
vBegin = gmesa->Begin | B_PrimType_Quads;
#define MGA_BASE( reg ) ((unsigned long)(mmesa->mgaScreen->mmio.map))
#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
-#define MGA_DEREF( reg ) *(volatile int32_t *)MGA_ADDR( reg )
+#define MGA_DEREF( reg ) *(volatile uint32_t *)MGA_ADDR( reg )
#define MGA_READ( reg ) MGA_DEREF( reg )
#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
GLuint num_verts;
GLubyte *verts;
- int32_t ClearColor; /* Color used to clear color buffer */
- int32_t ClearDepth; /* Value used to clear depth buffer */
- int32_t ClearStencil; /* Value used to clear stencil */
+ uint32_t ClearColor; /* Color used to clear color buffer */
+ uint32_t ClearDepth; /* Value used to clear depth buffer */
+ uint32_t ClearStencil; /* Value used to clear stencil */
/* Map GL texture units onto hardware
*/
static int r128WaitForFrameCompletion( r128ContextPtr rmesa )
{
unsigned char *R128MMIO = rmesa->r128Screen->mmio.map;
- int32_t frame;
+ uint32_t frame;
int i;
int wait = 0;
#include "r128_reg.h"
#include "r128_lock.h"
-#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(int32_t))
+#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(uint32_t))
extern drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa );
static __inline void *r128AllocDmaLow( r128ContextPtr rmesa, int bytes )
{
- int32_t *head;
+ uint32_t *head;
if ( !rmesa->vert_buf ) {
LOCK_HARDWARE( rmesa );
UNLOCK_HARDWARE( rmesa );
}
- head = (int32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used);
+ head = (uint32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used);
rmesa->vert_buf->used += bytes;
return head;
}
case GL_TEXTURE_LOD_BIAS:
{
- int32_t t = rmesa->setup.tex_cntl_c;
+ uint32_t t = rmesa->setup.tex_cntl_c;
GLint bias;
- int32_t b;
+ uint32_t b;
/* GTH: This isn't exactly correct, but gives good results up to a
* certain point. It is better than completely ignoring the LOD
bias = 127;
}
- b = (int32_t)bias & 0xff;
+ b = (uint32_t)bias & 0xff;
t &= ~R128_LOD_BIAS_MASK;
t |= (b << R128_LOD_BIAS_SHIFT);
#define R128PACKCOLOR4444( r, g, b, a ) \
((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-static __inline__ int32_t r128PackColor( GLuint cpp,
+static __inline__ uint32_t r128PackColor( GLuint cpp,
GLubyte r, GLubyte g,
GLubyte b, GLubyte a )
{
int imageWidth, imageHeight;
int remaining, rows;
int format, dwords;
- int32_t pitch, offset;
+ uint32_t pitch, offset;
int i;
/* Ensure we have a valid texture to upload */
remaining > 0 ;
remaining -= rows, y += rows, i++ )
{
- int32_t *dst;
+ uint32_t *dst;
drmBufPtr buffer;
assert(image->Data);
LOCK_HARDWARE( rmesa );
buffer = r128GetBufferLocked( rmesa );
- dst = (int32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET);
+ dst = (uint32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET);
/* Copy the next chunck of the texture image into the blit buffer */
{
struct r128_tex_obj {
driTextureObject base;
- int32_t bufAddr; /* Offset to start of locally
+ uint32_t bufAddr; /* Offset to start of locally
shared texture block */
GLuint age;
r128TexImage image[R128_MAX_TEXTURE_LEVELS]; /* Image data for all
mipmap levels */
- int32_t textureFormat; /* Actual hardware format */
+ uint32_t textureFormat; /* Actual hardware format */
drm_r128_texture_regs_t setup; /* Setup regs for texture */
};
typedef struct {
/* Common registers */
- int32_t ovr_clr;
- int32_t ovr_wid_left_right;
- int32_t ovr_wid_top_bottom;
- int32_t ov0_scale_cntl;
- int32_t mpp_tb_config;
- int32_t mpp_gp_config;
- int32_t subpic_cntl;
- int32_t viph_control;
- int32_t i2c_cntl_1;
- int32_t gen_int_cntl;
- int32_t cap0_trig_cntl;
- int32_t cap1_trig_cntl;
- int32_t bus_cntl;
- int32_t config_cntl;
+ uint32_t ovr_clr;
+ uint32_t ovr_wid_left_right;
+ uint32_t ovr_wid_top_bottom;
+ uint32_t ov0_scale_cntl;
+ uint32_t mpp_tb_config;
+ uint32_t mpp_gp_config;
+ uint32_t subpic_cntl;
+ uint32_t viph_control;
+ uint32_t i2c_cntl_1;
+ uint32_t gen_int_cntl;
+ uint32_t cap0_trig_cntl;
+ uint32_t cap1_trig_cntl;
+ uint32_t bus_cntl;
+ uint32_t config_cntl;
/* Other registers to save for VT switches */
- int32_t dp_datatype;
- int32_t gen_reset_cntl;
- int32_t clock_cntl_index;
- int32_t amcgpio_en_reg;
- int32_t amcgpio_mask;
+ uint32_t dp_datatype;
+ uint32_t gen_reset_cntl;
+ uint32_t clock_cntl_index;
+ uint32_t amcgpio_en_reg;
+ uint32_t amcgpio_mask;
/* CRTC registers */
- int32_t crtc_gen_cntl;
- int32_t crtc_ext_cntl;
- int32_t dac_cntl;
- int32_t crtc_h_total_disp;
- int32_t crtc_h_sync_strt_wid;
- int32_t crtc_v_total_disp;
- int32_t crtc_v_sync_strt_wid;
- int32_t crtc_offset;
- int32_t crtc_offset_cntl;
- int32_t crtc_pitch;
+ uint32_t crtc_gen_cntl;
+ uint32_t crtc_ext_cntl;
+ uint32_t dac_cntl;
+ uint32_t crtc_h_total_disp;
+ uint32_t crtc_h_sync_strt_wid;
+ uint32_t crtc_v_total_disp;
+ uint32_t crtc_v_sync_strt_wid;
+ uint32_t crtc_offset;
+ uint32_t crtc_offset_cntl;
+ uint32_t crtc_pitch;
/* CRTC2 registers */
- int32_t crtc2_gen_cntl;
+ uint32_t crtc2_gen_cntl;
/* Flat panel registers */
- int32_t fp_crtc_h_total_disp;
- int32_t fp_crtc_v_total_disp;
- int32_t fp_gen_cntl;
- int32_t fp_h_sync_strt_wid;
- int32_t fp_horz_stretch;
- int32_t fp_panel_cntl;
- int32_t fp_v_sync_strt_wid;
- int32_t fp_vert_stretch;
- int32_t lvds_gen_cntl;
- int32_t tmds_crc;
- int32_t tmds_transmitter_cntl;
+ uint32_t fp_crtc_h_total_disp;
+ uint32_t fp_crtc_v_total_disp;
+ uint32_t fp_gen_cntl;
+ uint32_t fp_h_sync_strt_wid;
+ uint32_t fp_horz_stretch;
+ uint32_t fp_panel_cntl;
+ uint32_t fp_v_sync_strt_wid;
+ uint32_t fp_vert_stretch;
+ uint32_t lvds_gen_cntl;
+ uint32_t tmds_crc;
+ uint32_t tmds_transmitter_cntl;
/* Computed values for PLL */
- int32_t dot_clock_freq;
- int32_t pll_output_freq;
+ uint32_t dot_clock_freq;
+ uint32_t pll_output_freq;
int feedback_div;
int post_div;
/* PLL registers */
- int32_t ppll_ref_div;
- int32_t ppll_div_3;
- int32_t htotal_cntl;
+ uint32_t ppll_ref_div;
+ uint32_t ppll_div_3;
+ uint32_t htotal_cntl;
/* DDA register */
- int32_t dda_config;
- int32_t dda_on_off;
+ uint32_t dda_config;
+ uint32_t dda_on_off;
/* Pallet */
GLboolean palette_valid;
- int32_t palette[256];
+ uint32_t palette[256];
} R128SaveRec, *R128SavePtr;
#ifndef _SOLO
typedef struct {
CARD16 reference_freq;
CARD16 reference_div;
- int32_t min_pll_freq;
- int32_t max_pll_freq;
+ uint32_t min_pll_freq;
+ uint32_t max_pll_freq;
CARD16 xclk;
} R128PLLRec, *R128PLLPtr;
unsigned char *MMIO; /* Map of MMIO region */
unsigned char *FB; /* Map of frame buffer */
- int32_t MemCntl;
- int32_t BusCntl;
+ uint32_t MemCntl;
+ uint32_t BusCntl;
unsigned long FbMapSize; /* Size of frame buffer, in bytes */
int Flags; /* Saved copy of mode flags */
#ifndef _SOLO
- int8_t BIOSDisplay; /* Device the BIOS is set to display to */
+ uint8_t BIOSDisplay; /* Device the BIOS is set to display to */
GLboolean HasPanelRegs; /* Current chip can connect to a FP */
- int8_t *VBIOS; /* Video BIOS for mode validation on FPs */
+ uint8_t *VBIOS; /* Video BIOS for mode validation on FPs */
int FPBIOSstart; /* Start of the flat panel info */
#endif
/* Computed values for FPs */
/* Computed values for Rage 128 */
int pitch;
int datatype;
- int32_t dp_gui_master_cntl;
+ uint32_t dp_gui_master_cntl;
/* Saved values for ScreenToScreenCopy */
int xdir;
int log2TexGran;
/* Saved scissor values */
- int32_t sc_left;
- int32_t sc_right;
- int32_t sc_top;
- int32_t sc_bottom;
+ uint32_t sc_left;
+ uint32_t sc_right;
+ uint32_t sc_top;
+ uint32_t sc_bottom;
- int32_t re_top_left;
- int32_t re_width_height;
+ uint32_t re_top_left;
+ uint32_t re_width_height;
- int32_t aux_sc_cntl;
+ uint32_t aux_sc_cntl;
int irq;
- int32_t gen_int_cntl;
+ uint32_t gen_int_cntl;
GLboolean DMAForXv;
#endif
GLboolean isDFP;
GLboolean isPro2;
I2CBusPtr pI2CBus;
- int32_t DDCReg;
+ uint32_t DDCReg;
#endif
} R128InfoRec, *R128InfoPtr;
#define R128_VERBOSE 0
-#define RING_LOCALS int32_t *__head; int __count;
+#define RING_LOCALS uint32_t *__head; int __count;
#define R128CCE_REFRESH(pScrn, info) \
do { \
fprintf(stderr, \
"ADVANCE_RING() used: %d+%d=%d/%d\n", \
info->indirectBuffer->used - info->indirectStart, \
- __count * sizeof(int32_t), \
+ __count * sizeof(uint32_t), \
info->indirectBuffer->used - info->indirectStart + \
- __count * sizeof(int32_t), \
+ __count * sizeof(uint32_t), \
info->indirectBuffer->total - info->indirectStart ); \
} \
- info->indirectBuffer->used += __count * (int)sizeof(int32_t); \
+ info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
} while (0)
#define OUT_RING( x ) do { \
{
R128InfoPtr info = ctx->driverPrivate;
unsigned char *R128MMIO = ctx->MMIOAddress;
- int32_t chunk;
+ uint32_t chunk;
int ret;
int flags;
* SwapBuffers with client-side throttling
*/
-static int32_t r200GetLastFrame(r200ContextPtr rmesa)
+static uint32_t r200GetLastFrame(r200ContextPtr rmesa)
{
drm_radeon_getparam_t gp;
int ret;
- int32_t frame;
+ uint32_t frame;
gp.param = RADEON_PARAM_LAST_FRAME;
gp.value = (int *)&frame;
__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
return NULL;
}
- screen->scratch = (__volatile__ int32_t *)
+ screen->scratch = (__volatile__ uint32_t *)
((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
screen->buffers = drmMapBufs( sPriv->fd );
static void r200UpdateSpecular( GLcontext *ctx )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
+ uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
R200_STATECHANGE( rmesa, tcl );
R200_STATECHANGE( rmesa, vtx );
* SwapBuffers with client-side throttling
*/
-static int32_t radeonGetLastFrame (radeonContextPtr rmesa)
+static uint32_t radeonGetLastFrame (radeonContextPtr rmesa)
{
unsigned char *RADEONMMIO = rmesa->radeonScreen->mmio.map;
int ret;
- int32_t frame;
+ uint32_t frame;
if (rmesa->dri.screen->drmMinor >= 4) {
drm_radeon_getparam_t gp;
__DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
drm_radeon_sarea_t *sarea = rmesa->sarea;
unsigned char *RADEONMMIO = rmesa->radeonScreen->mmio.map;
- int32_t clear;
+ uint32_t clear;
GLuint flags = 0;
GLuint color_mask = 0;
GLint ret, i;
__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
return NULL;
}
- screen->scratch = (__volatile__ int32_t *)
+ screen->scratch = (__volatile__ uint32_t *)
((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
screen->buffers = drmMapBufs( sPriv->fd );
drmBufMapPtr buffers;
- __volatile__ int32_t *scratch;
+ __volatile__ uint32_t *scratch;
__DRIscreenPrivate *driScreen;
unsigned int sarea_priv_offset;
static void radeonUpdateSpecular( GLcontext *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
+ uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
RADEON_STATECHANGE( rmesa, tcl );