+2004-07-28 Aldy Hernandez <aldyh@redhat.com>
+
+ * config/rs6000/rs6000.md ("move_from_CR_gt_bit"): Rename to
+ move_from_CR_eq_bit.
+ Rename UNSPEC_MV_CR_GT to UNSPEC_MV_CR_EQ.
+
+
+ * config/rs6000/spe.md ("e500_flip_gt_bit"): Rename to
+ e500_flip_eq_bit.
+
+ * config/rs6000/rs6000-protos.h: Rename output_e500_flip_gt_bit to
+ output_e500_flip_eq_bit.
+
+ * config/rs6000/rs6000.c (output_e500_flip_gt_bit): Rename to
+ output_e500_flip_eq_bit.
+ (rs6000_emit_sCOND): Rename call to output_e500_flip_gt_bit to
+ output_e500_flip_eq_bit.
+ Rename gen_move_from_CR_gt_bit to gen_move_from_CR_eq_bit.
+ (print_operand): case D. Get to EQ bit.
+
2004-07-28 Richard Sandiford <rsandifo@redhat.com>
* gcov.c (function_summary): Add missing \n.
extern void rs6000_emit_sCOND (enum rtx_code, rtx);
extern void rs6000_emit_cbranch (enum rtx_code, rtx);
extern char * output_cbranch (rtx, const char *, int, rtx);
-extern char * output_e500_flip_gt_bit (rtx, rtx);
+extern char * output_e500_flip_eq_bit (rtx, rtx);
extern rtx rs6000_emit_set_const (rtx, enum machine_mode, rtx, int);
extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx);
extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx);
return;
case 'D':
- /* Like 'J' but get to the GT bit. */
+ /* Like 'J' but get to the EQ bit. */
if (GET_CODE (x) != REG)
abort ();
- /* Bit 1 is GT bit. */
- i = 4 * (REGNO (x) - CR0_REGNO) + 1;
+ /* Bit 1 is EQ bit. */
+ i = 4 * (REGNO (x) - CR0_REGNO) + 2;
/* If we want bit 31, write a shift count of zero, not 32. */
fprintf (file, "%d", i == 31 ? 0 : i + 1);
abort ();
if (cond_code == NE)
- emit_insn (gen_e500_flip_gt_bit (t, t));
+ emit_insn (gen_e500_flip_eq_bit (t, t));
- emit_insn (gen_move_from_CR_gt_bit (result, t));
+ emit_insn (gen_move_from_CR_eq_bit (result, t));
return;
}
return string;
}
-/* Return the string to flip the GT bit on a CR. */
+/* Return the string to flip the EQ bit on a CR. */
char *
-output_e500_flip_gt_bit (rtx dst, rtx src)
+output_e500_flip_eq_bit (rtx dst, rtx src)
{
static char string[64];
int a, b;
|| GET_CODE (src) != REG || ! CR_REGNO_P (REGNO (src)))
abort ();
- /* GT bit. */
- a = 4 * (REGNO (dst) - CR0_REGNO) + 1;
- b = 4 * (REGNO (src) - CR0_REGNO) + 1;
+ /* EQ bit. */
+ a = 4 * (REGNO (dst) - CR0_REGNO) + 2;
+ b = 4 * (REGNO (src) - CR0_REGNO) + 2;
sprintf (string, "crnot %d,%d", a, b);
return string;
(UNSPEC_TLSGOTTPREL 28)
(UNSPEC_TLSTLS 29)
(UNSPEC_FIX_TRUNC_TF 30) ; fadd, rounding towards zero
- (UNSPEC_MV_CR_GT 31) ; move_from_CR_gt_bit
+ (UNSPEC_MV_CR_EQ 31) ; move_from_CR_eq_bit
])
;;
(set_attr "length" "12")])
;; Same as above, but get the GT bit.
-(define_insn "move_from_CR_gt_bit"
+(define_insn "move_from_CR_eq_bit"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (unspec:SI [(match_operand 1 "cc_reg_operand" "y")] UNSPEC_MV_CR_GT))]
+ (unspec:SI [(match_operand 1 "cc_reg_operand" "y")] UNSPEC_MV_CR_EQ))]
"TARGET_E500"
"mfcr %0\;{rlinm|rlwinm} %0,%0,%D1,1"
[(set_attr "type" "mfcr")
;; FP comparison stuff.
;; Flip the GT bit.
-(define_insn "e500_flip_gt_bit"
+(define_insn "e500_flip_eq_bit"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
(unspec:CCFP
[(match_operand:CCFP 1 "cc_reg_operand" "y")] 999))]
"!TARGET_FPRS && TARGET_HARD_FLOAT"
"*
{
- return output_e500_flip_gt_bit (operands[0], operands[1]);
+ return output_e500_flip_eq_bit (operands[0], operands[1]);
}"
[(set_attr "type" "cr_logical")])