ruby: improved stall and wait debugging
authorBrad Beckmann <Brad.Beckmann@amd.com>
Mon, 20 Jul 2015 14:15:18 +0000 (09:15 -0500)
committerBrad Beckmann <Brad.Beckmann@amd.com>
Mon, 20 Jul 2015 14:15:18 +0000 (09:15 -0500)
Added dprintfs and asserts for identifying stall and wait bugs.

src/mem/ruby/network/MessageBuffer.cc
src/mem/ruby/slicc_interface/AbstractController.cc

index d823c0a1f7d30596f9003cf775357e63ed5fd9ba..484d2876bba48a63bbc1bed91e7379894bffd527 100644 (file)
@@ -295,7 +295,7 @@ MessageBuffer::reanalyzeList(list<MsgPtr> &lt, Tick schdTick)
 void
 MessageBuffer::reanalyzeMessages(const Address& addr)
 {
-    DPRINTF(RubyQueue, "ReanalyzeMessages\n");
+    DPRINTF(RubyQueue, "ReanalyzeMessages %s\n", addr);
     assert(m_stall_msg_map.count(addr) > 0);
     Tick curTick = m_receiver->clockEdge();
 
index 1ac99c882321ee15844c16f0aab28e46e66003e8..dfcd61ab21595e94723989ce4154284ef218cfb8 100644 (file)
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include "mem/protocol/MemoryMsg.hh"
 #include "mem/ruby/slicc_interface/AbstractController.hh"
+
+#include "debug/RubyQueue.hh"
+#include "mem/protocol/MemoryMsg.hh"
 #include "mem/ruby/system/Sequencer.hh"
 #include "mem/ruby/system/System.hh"
 #include "sim/system.hh"
@@ -103,6 +105,9 @@ AbstractController::stallBuffer(MessageBuffer* buf, Address addr)
         msgVec->resize(m_in_ports, NULL);
         m_waiting_buffers[addr] = msgVec;
     }
+    DPRINTF(RubyQueue, "stalling %s port %d addr %s\n", buf, m_cur_in_port,
+            addr);
+    assert(m_in_ports > m_cur_in_port);
     (*(m_waiting_buffers[addr]))[m_cur_in_port] = buf;
 }