i965/fs: Better guess the width of LOAD_PAYLOAD

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index ad61b33b754d1baba968601ff7e1aca88ee3b34c..3eb429f51ee3e9be76ff469e6b5116baf69be227 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -337,8 +337,15 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 fs_inst *
 fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
 {
-   fs_inst *inst = new(mem_ctx) fs_inst(SHADER_OPCODE_LOAD_PAYLOAD, dst, src,
-                                        sources);
+   uint8_t exec_size = dst.width;
+   for (int i = 0; i < sources; ++i) {
+      assert(src[i].width % dst.width == 0);
+      if (src[i].width > exec_size)
+         exec_size = src[i].width;
+   }
+
+   fs_inst *inst = new(mem_ctx) fs_inst(SHADER_OPCODE_LOAD_PAYLOAD, exec_size,
+                                        dst, src, sources);
    inst->regs_written = 0;
    for (int i = 0; i < sources; ++i) {
       /* The LOAD_PAYLOAD instruction only really makes sense if we are