take a copy of SPRs so they are not modified by ISACaller

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 8e7a0e0650eaa9e24ead9c6f5411e505acd68c73..f444b14f7887c6c143c6f8505018ba5838d1eb0c 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -620,6 +620,7 @@ class ISACaller:
         self.msr = SelectableInt(initial_msr, 64)  # underlying reg
         self.pc = PC()
         # GPR FPR SPR registers
+        initial_sprs = copy(initial_sprs) # so as not to get modified
         self.gpr = GPR(decoder2, self, self.svstate, regfile)
         self.fpr = GPR(decoder2, self, self.svstate, fpregfile)
         self.spr = SPR(decoder2, initial_sprs) # initialise SPRs before MMU