| NN | RS | RA | sh | SH | 01 | 1010 110 |Rc| rsvd | |
| NN | RT | RA | RB | 0 | 01 | 0110 110 |Rc| rsvd | |
| NN | RS | RA | SH | 0 | 01 | 1110 110 |Rc| rsvd | |
-| NN | RT | RA | RB | 1 | 01 | 1110 110 |Rc| rsvd | |
+| NN | RT | RA | RB | 1 | 01 | 1110 110 |Rc| absdu | X-Form |
| NN | RS | RA | RB | 0 | 10 | 0010 110 |Rc| bmator | X-Form |
| NN | RS | RA | RB | 0 | 10 | 0110 110 |Rc| bmatand | X-Form |
| NN | RS | RA | RB | 0 | 10 | 1010 110 |Rc| bmatxor | X-Form |
}
```
-## abs
+## absdu
required for the [[sv/av_opcodes]], these exist in Packed SIMD (VSX)
but not scalar
```
-uint_xlen_t intabs(uint_xlen_t rs1, uint_xlen_t rs2) {
+uint_xlen_t absdu(uint_xlen_t rs1, uint_xlen_t rs2) {
return (src1 > src2) ? (src1-src2) : (src2-src1)
}
```