(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 4369d2654552c01a7c91bd8fcbd886c315e4947e..cfe180600b867e44a74fde94db4c74f84b5d8627 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -487,7 +487,7 @@ commercial designs.  Once the context is clear, their synthesis
 can be proposed.  These are:
 
 * [ZOLC: Zero-Overhead Loop Control]()
-* [OpenCAPI and Extra-V]()
+* [OpenCAPI and Extra-V](https://dl.acm.org/doi/abs/10.14778/3137765.3137776)
 * [Snitch]()