}
static bool
-draw_vbo(struct ilo_3d *hw3d, const struct ilo_context *ilo,
+draw_vbo(struct ilo_3d *hw3d, const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted)
{
bool need_flush = false;
* happens in the middle of a batch buffer, we need to insert manual
* flushes.
*/
- need_flush = (ilo->dirty & ILO_DIRTY_FB);
+ need_flush = (vec->dirty & ILO_DIRTY_FB);
/* same to SO target changes */
- need_flush |= (ilo->dirty & ILO_DIRTY_SO);
+ need_flush |= (vec->dirty & ILO_DIRTY_SO);
}
/* make sure there is enough room first */
max_len = ilo_3d_pipeline_estimate_size(hw3d->pipeline,
- ILO_3D_PIPELINE_DRAW, ilo);
+ ILO_3D_PIPELINE_DRAW, vec);
if (need_flush) {
max_len += ilo_3d_pipeline_estimate_size(hw3d->pipeline,
ILO_3D_PIPELINE_FLUSH, NULL);
if (need_flush)
ilo_3d_pipeline_emit_flush(hw3d->pipeline);
- return ilo_3d_pipeline_emit_draw(hw3d->pipeline, ilo,
+ return ilo_3d_pipeline_emit_draw(hw3d->pipeline, vec,
prim_generated, prim_emitted);
}
return true;
/* Note: indices must be unsigned byte, unsigned short or unsigned int */
- switch (ilo->ib.index_size) {
+ switch (ilo->state_vector.ib.index_size) {
case 1:
return ((restart_index & 0xff) == 0xff);
break;
ilo_draw_vbo_with_sw_restart(struct pipe_context *pipe,
const struct pipe_draw_info *info)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
struct pipe_draw_info *restart_info = NULL;
int sub_prim_count = 1;
return;
}
- if (ilo->ib.buffer) {
+ if (vec->ib.buffer) {
struct pipe_transfer *transfer;
const void *map;
- map = pipe_buffer_map(pipe, ilo->ib.buffer,
+ map = pipe_buffer_map(pipe, vec->ib.buffer,
PIPE_TRANSFER_READ, &transfer);
- sub_prim_count = ilo_find_sub_primitives(map + ilo->ib.offset,
- ilo->ib.index_size, info, restart_info);
+ sub_prim_count = ilo_find_sub_primitives(map + vec->ib.offset,
+ vec->ib.index_size, info, restart_info);
pipe_buffer_unmap(pipe, transfer);
}
else {
- sub_prim_count = ilo_find_sub_primitives(ilo->ib.user_buffer,
- ilo->ib.index_size, info, restart_info);
+ sub_prim_count =
+ ilo_find_sub_primitives(vec->ib.user_buffer,
+ vec->ib.index_size, info, restart_info);
}
info = restart_info;
u_prim_name(info->mode), info->start, info->count);
}
- ilo_dump_dirty_flags(ilo->dirty);
+ ilo_state_vector_dump_dirty(&ilo->state_vector);
}
if (!ilo_3d_pass_render_condition(ilo))
ilo_blit_resolve_framebuffer(ilo);
/* If draw_vbo ever fails, return immediately. */
- if (!draw_vbo(hw3d, ilo, &prim_generated, &prim_emitted))
+ if (!draw_vbo(hw3d, &ilo->state_vector, &prim_generated, &prim_emitted))
return;
/* clear dirty status */
- ilo->dirty = 0x0;
+ ilo->state_vector.dirty = 0x0;
hw3d->new_batch = false;
/* avoid dangling pointer reference */
- ilo->draw = NULL;
+ ilo->state_vector.draw = NULL;
update_prim_count(hw3d, prim_generated, prim_emitted);
#include "intel_winsys.h"
#include "ilo_blitter.h"
-#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_state.h"
#include "ilo_3d_pipeline_gen6.h"
*/
bool
ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted)
{
bool success;
- if (ilo->dirty & ILO_DIRTY_SO &&
- ilo->so.enabled && !ilo->so.append_bitmask) {
+ if (vec->dirty & ILO_DIRTY_SO &&
+ vec->so.enabled && !vec->so.append_bitmask) {
/*
* We keep track of the SVBI in the driver, so that we can restore it
* when the HW context is invalidated (by another process). The value
handle_invalid_batch_bo(p, false);
/* draw! */
- p->emit_draw(p, ilo);
+ p->emit_draw(p, vec);
- if (ilo_builder_validate(&ilo->cp->builder, 0, NULL)) {
+ if (ilo_builder_validate(&p->cp->builder, 0, NULL)) {
success = true;
} else {
/* rewind */
if (success) {
const int num_verts =
- u_vertices_per_prim(u_reduced_prim(ilo->draw->mode));
+ u_vertices_per_prim(u_reduced_prim(vec->draw->mode));
const int max_emit =
(p->state.so_max_vertices - p->state.so_num_vertices) / num_verts;
const int generated =
- u_reduced_prims_for_vertices(ilo->draw->mode, ilo->draw->count);
+ u_reduced_prims_for_vertices(vec->draw->mode, vec->draw->count);
const int emitted = MIN2(generated, max_emit);
p->state.so_num_vertices += emitted * num_verts;
struct intel_bo;
struct ilo_blitter;
struct ilo_cp;
-struct ilo_context;
+struct ilo_state_vector;
enum ilo_3d_pipeline_invalidate_flags {
ILO_3D_PIPELINE_INVALIDATE_HW = 1 << 0,
const void *arg);
void (*emit_draw)(struct ilo_3d_pipeline *pipeline,
- const struct ilo_context *ilo);
+ const struct ilo_state_vector *vec);
void (*emit_flush)(struct ilo_3d_pipeline *pipeline);
bool
ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted);
void
#include "ilo_builder_3d.h"
#include "ilo_builder_mi.h"
#include "ilo_builder_render.h"
-#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_shader.h"
#include "ilo_state.h"
void
gen6_pipeline_common_select(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* PIPELINE_SELECT */
void
gen6_pipeline_common_sip(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* STATE_SIP */
void
gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* STATE_BASE_ADDRESS */
static void
gen6_pipeline_common_urb(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB */
if (DIRTY(VE) || DIRTY(VS) || DIRTY(GS)) {
- const bool gs_active = (ilo->gs || (ilo->vs &&
- ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_VS_GEN6_SO)));
+ const bool gs_active = (vec->gs || (vec->vs &&
+ ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_VS_GEN6_SO)));
int vs_entry_size, gs_entry_size;
int vs_total_size, gs_total_size;
- vs_entry_size = (ilo->vs) ?
- ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
+ vs_entry_size = (vec->vs) ?
+ ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
/*
* As indicated by 2e712e41db0c0676e9f30fc73172c0e8de8d84d4, VF and VS
* VS-generated output data, output URB availability isn't a
* factor."
*/
- if (vs_entry_size < ilo->ve->count)
- vs_entry_size = ilo->ve->count;
+ if (vs_entry_size < vec->ve->count)
+ vs_entry_size = vec->ve->count;
- gs_entry_size = (ilo->gs) ?
- ilo_shader_get_kernel_param(ilo->gs, ILO_KERNEL_OUTPUT_COUNT) :
+ gs_entry_size = (vec->gs) ?
+ ilo_shader_get_kernel_param(vec->gs, ILO_KERNEL_OUTPUT_COUNT) :
(gs_active) ? vs_entry_size : 0;
/* in bytes */
vs_entry_size *= sizeof(float) * 4;
gs_entry_size *= sizeof(float) * 4;
- vs_total_size = ilo->dev->urb_size;
+ vs_total_size = p->dev->urb_size;
if (gs_active) {
vs_total_size /= 2;
static void
gen6_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VIEWPORT_STATE_POINTERS */
static void
gen6_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CC_STATE_POINTERS */
static void
gen6_pipeline_common_pointers_3(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SCISSOR_STATE_POINTERS */
void
gen6_pipeline_vf(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
if (ilo_dev_gen(p->dev) >= ILO_GEN(7.5)) {
/* 3DSTATE_INDEX_BUFFER */
if (DIRTY(IB) || session->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(&p->cp->builder,
- &ilo->ib, false);
+ &vec->ib, false);
}
/* 3DSTATE_VF */
if (session->primitive_restart_changed) {
- gen7_3DSTATE_VF(&p->cp->builder, ilo->draw->primitive_restart,
- ilo->draw->restart_index);
+ gen7_3DSTATE_VF(&p->cp->builder, vec->draw->primitive_restart,
+ vec->draw->restart_index);
}
}
else {
if (DIRTY(IB) || session->primitive_restart_changed ||
session->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(&p->cp->builder,
- &ilo->ib, ilo->draw->primitive_restart);
+ &vec->ib, vec->draw->primitive_restart);
}
}
/* 3DSTATE_VERTEX_BUFFERS */
if (DIRTY(VB) || DIRTY(VE) || session->batch_bo_changed)
- gen6_3DSTATE_VERTEX_BUFFERS(&p->cp->builder, ilo->ve, &ilo->vb);
+ gen6_3DSTATE_VERTEX_BUFFERS(&p->cp->builder, vec->ve, &vec->vb);
/* 3DSTATE_VERTEX_ELEMENTS */
if (DIRTY(VE) || DIRTY(VS)) {
- const struct ilo_ve_state *ve = ilo->ve;
+ const struct ilo_ve_state *ve = vec->ve;
bool last_velement_edgeflag = false;
bool prepend_generate_ids = false;
- if (ilo->vs) {
- if (ilo_shader_get_kernel_param(ilo->vs,
+ if (vec->vs) {
+ if (ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_EDGEFLAG)) {
/* we rely on the state tracker here */
- assert(ilo_shader_get_kernel_param(ilo->vs,
+ assert(ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_INPUT_COUNT) == ve->count);
last_velement_edgeflag = true;
}
- if (ilo_shader_get_kernel_param(ilo->vs,
+ if (ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_INSTANCEID) ||
- ilo_shader_get_kernel_param(ilo->vs,
+ ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_VERTEXID))
prepend_generate_ids = true;
}
void
gen6_pipeline_vf_statistics(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VF_STATISTICS */
static void
gen6_pipeline_vf_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DPRIMITIVE */
- gen6_3DPRIMITIVE(&p->cp->builder, ilo->draw, &ilo->ib);
+ gen6_3DPRIMITIVE(&p->cp->builder, vec->draw, &vec->ib);
p->state.has_gen6_wa_pipe_control = false;
}
void
gen6_pipeline_vs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
/* 3DSTATE_VS */
if (emit_3dstate_vs) {
- const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
+ const int num_samplers = vec->sampler[PIPE_SHADER_VERTEX].count;
- gen6_3DSTATE_VS(&p->cp->builder, ilo->vs, num_samplers);
+ gen6_3DSTATE_VS(&p->cp->builder, vec->vs, num_samplers);
}
if (emit_3dstate_constant_vs && ilo_dev_gen(p->dev) == ILO_GEN(6))
static void
gen6_pipeline_gs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_GS */
session->prim_changed || session->kernel_bo_changed) {
const int verts_per_prim = u_vertices_per_prim(session->reduced_prim);
- gen6_3DSTATE_GS(&p->cp->builder, ilo->gs, ilo->vs, verts_per_prim);
+ gen6_3DSTATE_GS(&p->cp->builder, vec->gs, vec->vs, verts_per_prim);
}
}
bool
gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
- (ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
- (ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
+ (vec->gs) ? ilo_shader_get_kernel_so_info(vec->gs) :
+ (vec->vs) ? ilo_shader_get_kernel_so_info(vec->vs) : NULL;
unsigned max_svbi = 0xffffffff;
int i;
for (i = 0; i < so_info->num_outputs; i++) {
const int output_buffer = so_info->output[i].output_buffer;
const struct pipe_stream_output_target *so =
- ilo->so.states[output_buffer];
+ vec->so.states[output_buffer];
const int struct_size = so_info->stride[output_buffer] * 4;
const int elem_size = so_info->output[i].num_components * 4;
int buf_size, count;
static void
gen6_pipeline_gs_svbi(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
- const bool emit = gen6_pipeline_update_max_svbi(p, ilo, session);
+ const bool emit = gen6_pipeline_update_max_svbi(p, vec, session);
/* 3DSTATE_GS_SVB_INDEX */
if (emit) {
void
gen6_pipeline_clip(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CLIP */
* We do not do 2D clipping yet. Guard band test should only be enabled
* when the viewport is larger than the framebuffer.
*/
- for (i = 0; i < ilo->viewport.count; i++) {
- const struct ilo_viewport_cso *vp = &ilo->viewport.cso[i];
+ for (i = 0; i < vec->viewport.count; i++) {
+ const struct ilo_viewport_cso *vp = &vec->viewport.cso[i];
- if (vp->min_x > 0.0f || vp->max_x < ilo->fb.state.width ||
- vp->min_y > 0.0f || vp->max_y < ilo->fb.state.height) {
+ if (vp->min_x > 0.0f || vp->max_x < vec->fb.state.width ||
+ vp->min_y > 0.0f || vp->max_y < vec->fb.state.height) {
enable_guardband = false;
break;
}
}
- gen6_3DSTATE_CLIP(&p->cp->builder, ilo->rasterizer,
- ilo->fs, enable_guardband, 1);
+ gen6_3DSTATE_CLIP(&p->cp->builder, vec->rasterizer,
+ vec->fs, enable_guardband, 1);
}
}
static void
gen6_pipeline_sf(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SF */
if (DIRTY(RASTERIZER) || DIRTY(FS))
- gen6_3DSTATE_SF(&p->cp->builder, ilo->rasterizer, ilo->fs);
+ gen6_3DSTATE_SF(&p->cp->builder, vec->rasterizer, vec->fs);
}
void
gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DRAWING_RECTANGLE */
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_DRAWING_RECTANGLE(&p->cp->builder, 0, 0,
- ilo->fb.state.width, ilo->fb.state.height);
+ vec->fb.state.width, vec->fb.state.height);
}
}
static void
gen6_pipeline_wm(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_PS */
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) || DIRTY(DSA) ||
DIRTY(RASTERIZER) || session->kernel_bo_changed) {
- const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
- const bool dual_blend = ilo->blend->dual_blend;
- const bool cc_may_kill = (ilo->dsa->dw_alpha ||
- ilo->blend->alpha_to_coverage);
+ const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
+ const bool dual_blend = vec->blend->dual_blend;
+ const bool cc_may_kill = (vec->dsa->dw_alpha ||
+ vec->blend->alpha_to_coverage);
if (ilo_dev_gen(p->dev) == ILO_GEN(6) && session->hw_ctx_changed)
gen6_wa_pipe_control_wm_max_threads_stall(p);
- gen6_3DSTATE_WM(&p->cp->builder, ilo->fs, num_samplers,
- ilo->rasterizer, dual_blend, cc_may_kill, 0);
+ gen6_3DSTATE_WM(&p->cp->builder, vec->fs, num_samplers,
+ vec->rasterizer, dual_blend, cc_may_kill, 0);
}
}
static void
gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FB)) {
const uint32_t *packed_sample_pos;
- packed_sample_pos = (ilo->fb.num_samples > 1) ?
+ packed_sample_pos = (vec->fb.num_samples > 1) ?
&p->packed_sample_position_4x : &p->packed_sample_position_1x;
if (ilo_dev_gen(p->dev) == ILO_GEN(6)) {
}
gen6_3DSTATE_MULTISAMPLE(&p->cp->builder,
- ilo->fb.num_samples, packed_sample_pos,
- ilo->rasterizer->state.half_pixel_center);
+ vec->fb.num_samples, packed_sample_pos,
+ vec->rasterizer->state.half_pixel_center);
gen6_3DSTATE_SAMPLE_MASK(&p->cp->builder,
- (ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1);
+ (vec->fb.num_samples > 1) ? vec->sample_mask : 0x1);
}
}
static void
gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
const struct ilo_zs_surface *zs;
uint32_t clear_params;
- if (ilo->fb.state.zsbuf) {
+ if (vec->fb.state.zsbuf) {
const struct ilo_surface_cso *surface =
- (const struct ilo_surface_cso *) ilo->fb.state.zsbuf;
+ (const struct ilo_surface_cso *) vec->fb.state.zsbuf;
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(ilo_texture(surface->base.texture),
surface->base.u.tex.level, surface->base.u.tex.first_layer);
clear_params = slice->clear_value;
}
else {
- zs = &ilo->fb.null_zs;
+ zs = &vec->fb.null_zs;
clear_params = 0;
}
void
gen6_pipeline_wm_raster(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_POLY_STIPPLE_PATTERN and 3DSTATE_POLY_STIPPLE_OFFSET */
if ((DIRTY(RASTERIZER) || DIRTY(POLY_STIPPLE)) &&
- ilo->rasterizer->state.poly_stipple_enable) {
+ vec->rasterizer->state.poly_stipple_enable) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_POLY_STIPPLE_PATTERN(&p->cp->builder,
- &ilo->poly_stipple);
+ &vec->poly_stipple);
gen6_3DSTATE_POLY_STIPPLE_OFFSET(&p->cp->builder, 0, 0);
}
/* 3DSTATE_LINE_STIPPLE */
- if (DIRTY(RASTERIZER) && ilo->rasterizer->state.line_stipple_enable) {
+ if (DIRTY(RASTERIZER) && vec->rasterizer->state.line_stipple_enable) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_LINE_STIPPLE(&p->cp->builder,
- ilo->rasterizer->state.line_stipple_pattern,
- ilo->rasterizer->state.line_stipple_factor + 1);
+ vec->rasterizer->state.line_stipple_pattern,
+ vec->rasterizer->state.line_stipple_factor + 1);
}
/* 3DSTATE_AA_LINE_PARAMETERS */
- if (DIRTY(RASTERIZER) && ilo->rasterizer->state.line_smooth) {
+ if (DIRTY(RASTERIZER) && vec->rasterizer->state.line_smooth) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
static void
gen6_pipeline_state_viewports(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SF_CLIP_VIEWPORT and CC_VIEWPORT */
if (ilo_dev_gen(p->dev) >= ILO_GEN(7) && DIRTY(VIEWPORT)) {
p->state.SF_CLIP_VIEWPORT = gen7_SF_CLIP_VIEWPORT(&p->cp->builder,
- ilo->viewport.cso, ilo->viewport.count);
+ vec->viewport.cso, vec->viewport.count);
p->state.CC_VIEWPORT = gen6_CC_VIEWPORT(&p->cp->builder,
- ilo->viewport.cso, ilo->viewport.count);
+ vec->viewport.cso, vec->viewport.count);
session->viewport_state_changed = true;
}
/* SF_VIEWPORT, CLIP_VIEWPORT, and CC_VIEWPORT */
else if (DIRTY(VIEWPORT)) {
p->state.CLIP_VIEWPORT = gen6_CLIP_VIEWPORT(&p->cp->builder,
- ilo->viewport.cso, ilo->viewport.count);
+ vec->viewport.cso, vec->viewport.count);
p->state.SF_VIEWPORT = gen6_SF_VIEWPORT(&p->cp->builder,
- ilo->viewport.cso, ilo->viewport.count);
+ vec->viewport.cso, vec->viewport.count);
p->state.CC_VIEWPORT = gen6_CC_VIEWPORT(&p->cp->builder,
- ilo->viewport.cso, ilo->viewport.count);
+ vec->viewport.cso, vec->viewport.count);
session->viewport_state_changed = true;
}
static void
gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* BLEND_STATE */
if (DIRTY(BLEND) || DIRTY(FB) || DIRTY(DSA)) {
p->state.BLEND_STATE = gen6_BLEND_STATE(&p->cp->builder,
- ilo->blend, &ilo->fb, ilo->dsa);
+ vec->blend, &vec->fb, vec->dsa);
session->cc_state_blend_changed = true;
}
/* COLOR_CALC_STATE */
if (DIRTY(DSA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
p->state.COLOR_CALC_STATE =
- gen6_COLOR_CALC_STATE(&p->cp->builder, &ilo->stencil_ref,
- ilo->dsa->alpha_ref, &ilo->blend_color);
+ gen6_COLOR_CALC_STATE(&p->cp->builder, &vec->stencil_ref,
+ vec->dsa->alpha_ref, &vec->blend_color);
session->cc_state_cc_changed = true;
}
/* DEPTH_STENCIL_STATE */
if (DIRTY(DSA)) {
p->state.DEPTH_STENCIL_STATE =
- gen6_DEPTH_STENCIL_STATE(&p->cp->builder, ilo->dsa);
+ gen6_DEPTH_STENCIL_STATE(&p->cp->builder, vec->dsa);
session->cc_state_dsa_changed = true;
}
static void
gen6_pipeline_state_scissors(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SCISSOR_RECT */
if (DIRTY(SCISSOR) || DIRTY(VIEWPORT)) {
/* there should be as many scissors as there are viewports */
p->state.SCISSOR_RECT = gen6_SCISSOR_RECT(&p->cp->builder,
- &ilo->scissor, ilo->viewport.count);
+ &vec->scissor, vec->viewport.count);
session->scissor_state_changed = true;
}
static void
gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SURFACE_STATEs for render targets */
if (DIRTY(FB)) {
- const struct ilo_fb_state *fb = &ilo->fb;
+ const struct ilo_fb_state *fb = &vec->fb;
const int offset = ILO_WM_DRAW_SURFACE(0);
uint32_t *surface_state = &p->state.wm.SURFACE_STATE[offset];
int i;
static void
gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
- const struct ilo_so_state *so = &ilo->so;
+ const struct ilo_so_state *so = &vec->so;
if (ilo_dev_gen(p->dev) != ILO_GEN(6))
return;
/* SURFACE_STATEs for stream output targets */
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
- (ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
- (ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
+ (vec->gs) ? ilo_shader_get_kernel_so_info(vec->gs) :
+ (vec->vs) ? ilo_shader_get_kernel_so_info(vec->vs) : NULL;
const int offset = ILO_GS_SO_SURFACE(0);
uint32_t *surface_state = &p->state.gs.SURFACE_STATE[offset];
int i;
static void
gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
- const struct ilo_view_state *view = &ilo->view[shader_type];
+ const struct ilo_view_state *view = &vec->view[shader_type];
uint32_t *surface_state;
int offset, i;
bool skip = false;
static void
gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
- const struct ilo_cbuf_state *cbuf = &ilo->cbuf[shader_type];
+ const struct ilo_cbuf_state *cbuf = &vec->cbuf[shader_type];
uint32_t *surface_state;
bool *binding_table_changed;
int offset, count, i;
static void
gen6_pipeline_state_binding_tables(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
static void
gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
const struct ilo_sampler_cso * const *samplers =
- ilo->sampler[shader_type].cso;
+ vec->sampler[shader_type].cso;
const struct pipe_sampler_view * const *views =
- (const struct pipe_sampler_view **) ilo->view[shader_type].states;
- const int num_samplers = ilo->sampler[shader_type].count;
- const int num_views = ilo->view[shader_type].count;
+ (const struct pipe_sampler_view **) vec->view[shader_type].states;
+ const int num_samplers = vec->sampler[shader_type].count;
+ const int num_views = vec->view[shader_type].count;
uint32_t *sampler_state, *border_color_state;
bool emit_border_color = false;
bool skip = false;
static void
gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* push constant buffer for VS */
if (DIRTY(VS) || DIRTY(CBUF) || DIRTY(CLIP)) {
- const int cbuf0_size = (ilo->vs) ?
- ilo_shader_get_kernel_param(ilo->vs,
+ const int cbuf0_size = (vec->vs) ?
+ ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
- const int clip_state_size = (ilo->vs) ?
- ilo_shader_get_kernel_param(ilo->vs,
+ const int clip_state_size = (vec->vs) ?
+ ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_PCB_UCP_SIZE) : 0;
const int total_size = cbuf0_size + clip_state_size;
if (cbuf0_size) {
const struct ilo_cbuf_state *cbuf =
- &ilo->cbuf[PIPE_SHADER_VERTEX];
+ &vec->cbuf[PIPE_SHADER_VERTEX];
if (cbuf0_size <= cbuf->cso[0].user_buffer_size) {
memcpy(pcb, cbuf->cso[0].user_buffer, cbuf0_size);
}
if (clip_state_size)
- memcpy(pcb, &ilo->clip, clip_state_size);
+ memcpy(pcb, &vec->clip, clip_state_size);
session->pcb_state_vs_changed = true;
}
/* push constant buffer for FS */
if (DIRTY(FS) || DIRTY(CBUF)) {
- const int cbuf0_size = (ilo->fs) ?
- ilo_shader_get_kernel_param(ilo->fs, ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
+ const int cbuf0_size = (vec->fs) ?
+ ilo_shader_get_kernel_param(vec->fs, ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
if (cbuf0_size) {
- const struct ilo_cbuf_state *cbuf = &ilo->cbuf[PIPE_SHADER_FRAGMENT];
+ const struct ilo_cbuf_state *cbuf = &vec->cbuf[PIPE_SHADER_FRAGMENT];
void *pcb;
p->state.wm.PUSH_CONSTANT_BUFFER =
static void
gen6_pipeline_commands(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/*
* that of the classic i965 driver. It allows us to compare the command
* streams easily.
*/
- gen6_pipeline_common_select(p, ilo, session);
- gen6_pipeline_gs_svbi(p, ilo, session);
- gen6_pipeline_common_sip(p, ilo, session);
- gen6_pipeline_vf_statistics(p, ilo, session);
- gen6_pipeline_common_base_address(p, ilo, session);
- gen6_pipeline_common_pointers_1(p, ilo, session);
- gen6_pipeline_common_urb(p, ilo, session);
- gen6_pipeline_common_pointers_2(p, ilo, session);
- gen6_pipeline_wm_multisample(p, ilo, session);
- gen6_pipeline_vs(p, ilo, session);
- gen6_pipeline_gs(p, ilo, session);
- gen6_pipeline_clip(p, ilo, session);
- gen6_pipeline_sf(p, ilo, session);
- gen6_pipeline_wm(p, ilo, session);
- gen6_pipeline_common_pointers_3(p, ilo, session);
- gen6_pipeline_wm_depth(p, ilo, session);
- gen6_pipeline_wm_raster(p, ilo, session);
- gen6_pipeline_sf_rect(p, ilo, session);
- gen6_pipeline_vf(p, ilo, session);
- gen6_pipeline_vf_draw(p, ilo, session);
+ gen6_pipeline_common_select(p, vec, session);
+ gen6_pipeline_gs_svbi(p, vec, session);
+ gen6_pipeline_common_sip(p, vec, session);
+ gen6_pipeline_vf_statistics(p, vec, session);
+ gen6_pipeline_common_base_address(p, vec, session);
+ gen6_pipeline_common_pointers_1(p, vec, session);
+ gen6_pipeline_common_urb(p, vec, session);
+ gen6_pipeline_common_pointers_2(p, vec, session);
+ gen6_pipeline_wm_multisample(p, vec, session);
+ gen6_pipeline_vs(p, vec, session);
+ gen6_pipeline_gs(p, vec, session);
+ gen6_pipeline_clip(p, vec, session);
+ gen6_pipeline_sf(p, vec, session);
+ gen6_pipeline_wm(p, vec, session);
+ gen6_pipeline_common_pointers_3(p, vec, session);
+ gen6_pipeline_wm_depth(p, vec, session);
+ gen6_pipeline_wm_raster(p, vec, session);
+ gen6_pipeline_sf_rect(p, vec, session);
+ gen6_pipeline_vf(p, vec, session);
+ gen6_pipeline_vf_draw(p, vec, session);
}
void
gen6_pipeline_states(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
int shader_type;
- gen6_pipeline_state_viewports(p, ilo, session);
- gen6_pipeline_state_cc(p, ilo, session);
- gen6_pipeline_state_scissors(p, ilo, session);
- gen6_pipeline_state_pcb(p, ilo, session);
+ gen6_pipeline_state_viewports(p, vec, session);
+ gen6_pipeline_state_cc(p, vec, session);
+ gen6_pipeline_state_scissors(p, vec, session);
+ gen6_pipeline_state_pcb(p, vec, session);
/*
* upload all SURAFCE_STATEs together so that we know there are minimal
* paddings
*/
- gen6_pipeline_state_surfaces_rt(p, ilo, session);
- gen6_pipeline_state_surfaces_so(p, ilo, session);
+ gen6_pipeline_state_surfaces_rt(p, vec, session);
+ gen6_pipeline_state_surfaces_so(p, vec, session);
for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
- gen6_pipeline_state_surfaces_view(p, ilo, shader_type, session);
- gen6_pipeline_state_surfaces_const(p, ilo, shader_type, session);
+ gen6_pipeline_state_surfaces_view(p, vec, shader_type, session);
+ gen6_pipeline_state_surfaces_const(p, vec, shader_type, session);
}
for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
- gen6_pipeline_state_samplers(p, ilo, shader_type, session);
+ gen6_pipeline_state_samplers(p, vec, shader_type, session);
/* this must be called after all SURFACE_STATEs are uploaded */
- gen6_pipeline_state_binding_tables(p, ilo, shader_type, session);
+ gen6_pipeline_state_binding_tables(p, vec, shader_type, session);
}
}
void
gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
memset(session, 0, sizeof(*session));
- session->pipe_dirty = ilo->dirty;
- session->reduced_prim = u_reduced_prim(ilo->draw->mode);
+ session->pipe_dirty = vec->dirty;
+ session->reduced_prim = u_reduced_prim(vec->draw->mode);
/* available space before the session */
session->init_cp_space = ilo_cp_space(p->cp);
(p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_KERNEL_BO);
session->prim_changed = (p->state.reduced_prim != session->reduced_prim);
session->primitive_restart_changed =
- (p->state.primitive_restart != ilo->draw->primitive_restart);
+ (p->state.primitive_restart != vec->draw->primitive_restart);
}
}
void
gen6_pipeline_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* force all states to be uploaded if the state bo changed */
if (session->state_bo_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
- session->pipe_dirty = ilo->dirty;
+ session->pipe_dirty = vec->dirty;
- session->emit_draw_states(p, ilo, session);
+ session->emit_draw_states(p, vec, session);
/* force all commands to be uploaded if the HW context changed */
if (session->hw_ctx_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
- session->pipe_dirty = ilo->dirty;
+ session->pipe_dirty = vec->dirty;
- session->emit_draw_commands(p, ilo, session);
+ session->emit_draw_commands(p, vec, session);
}
void
gen6_pipeline_end(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* sanity check size estimation */
assert(session->init_cp_space - ilo_cp_space(p->cp) <=
- ilo_3d_pipeline_estimate_size(p, ILO_3D_PIPELINE_DRAW, ilo));
+ ilo_3d_pipeline_estimate_size(p, ILO_3D_PIPELINE_DRAW, vec));
p->state.reduced_prim = session->reduced_prim;
- p->state.primitive_restart = ilo->draw->primitive_restart;
+ p->state.primitive_restart = vec->draw->primitive_restart;
}
static void
ilo_3d_pipeline_emit_draw_gen6(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo)
+ const struct ilo_state_vector *vec)
{
struct gen6_pipeline_session session;
- gen6_pipeline_prepare(p, ilo, &session);
+ gen6_pipeline_prepare(p, vec, &session);
session.emit_draw_states = gen6_pipeline_states;
session.emit_draw_commands = gen6_pipeline_commands;
- gen6_pipeline_draw(p, ilo, &session);
- gen6_pipeline_end(p, ilo, &session);
+ gen6_pipeline_draw(p, vec, &session);
+ gen6_pipeline_end(p, vec, &session);
}
void
int
gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo)
+ const struct ilo_state_vector *vec)
{
static int static_size;
int sh_type, size;
int num_samplers, num_surfaces, pcb_size;
/* samplers */
- num_samplers = ilo->sampler[sh_type].count;
+ num_samplers = vec->sampler[sh_type].count;
/* sampler views and constant buffers */
- num_surfaces = ilo->view[sh_type].count +
- util_bitcount(ilo->cbuf[sh_type].enabled_mask);
+ num_surfaces = vec->view[sh_type].count +
+ util_bitcount(vec->cbuf[sh_type].enabled_mask);
pcb_size = 0;
switch (sh_type) {
case PIPE_SHADER_VERTEX:
- if (ilo->vs) {
+ if (vec->vs) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6)) {
const struct pipe_stream_output_info *so_info =
- ilo_shader_get_kernel_so_info(ilo->vs);
+ ilo_shader_get_kernel_so_info(vec->vs);
/* stream outputs */
num_surfaces += so_info->num_outputs;
}
- pcb_size = ilo_shader_get_kernel_param(ilo->vs,
+ pcb_size = ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_PCB_CBUF0_SIZE);
- pcb_size += ilo_shader_get_kernel_param(ilo->vs,
+ pcb_size += ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_PCB_UCP_SIZE);
}
break;
case PIPE_SHADER_GEOMETRY:
- if (ilo->gs && ilo_dev_gen(p->dev) == ILO_GEN(6)) {
+ if (vec->gs && ilo_dev_gen(p->dev) == ILO_GEN(6)) {
const struct pipe_stream_output_info *so_info =
- ilo_shader_get_kernel_so_info(ilo->gs);
+ ilo_shader_get_kernel_so_info(vec->gs);
/* stream outputs */
num_surfaces += so_info->num_outputs;
break;
case PIPE_SHADER_FRAGMENT:
/* render targets */
- num_surfaces += ilo->fb.state.nr_cbufs;
+ num_surfaces += vec->fb.state.nr_cbufs;
- if (ilo->fs) {
- pcb_size = ilo_shader_get_kernel_param(ilo->fs,
+ if (vec->fs) {
+ pcb_size = ilo_shader_get_kernel_param(vec->fs,
ILO_KERNEL_PCB_CBUF0_SIZE);
}
break;
switch (action) {
case ILO_3D_PIPELINE_DRAW:
{
- const struct ilo_context *ilo = arg;
+ const struct ilo_state_vector *ilo = arg;
size = gen6_pipeline_max_command_size(p) +
gen6_pipeline_estimate_state_size(p, ilo);
#include "ilo_common.h"
struct ilo_3d_pipeline;
-struct ilo_context;
+struct ilo_state_vector;
struct gen6_pipeline_session {
uint32_t pipe_dirty;
bool primitive_restart_changed;
void (*emit_draw_states)(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void (*emit_draw_commands)(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
/* indirect states */
void
gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_end(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_select(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_sip(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vf(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vf_statistics(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_clip(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_wm_raster(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_states(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
bool
gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
int
gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo);
+ const struct ilo_state_vector *ilo);
void
ilo_3d_pipeline_emit_flush_gen6(struct ilo_3d_pipeline *p);
#include "ilo_blitter.h"
#include "ilo_builder_3d.h"
#include "ilo_builder_render.h"
-#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_shader.h"
#include "ilo_state.h"
static void
gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB_{VS,GS,HS,DS} */
p->dev->gt == 3) ? 32768 : 16384;
int vs_entry_size, vs_total_size;
- vs_entry_size = (ilo->vs) ?
- ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
+ vs_entry_size = (vec->vs) ?
+ ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
/*
* From the Ivy Bridge PRM, volume 2 part 1, page 35:
* Allocation Size must be sized to the maximum of the vertex input
* and output structures."
*/
- if (vs_entry_size < ilo->ve->count)
- vs_entry_size = ilo->ve->count;
+ if (vs_entry_size < vec->ve->count)
+ vs_entry_size = vec->ve->count;
vs_entry_size *= sizeof(float) * 4;
- vs_total_size = ilo->dev->urb_size - offset;
+ vs_total_size = p->dev->urb_size - offset;
gen7_wa_pipe_control_vs_depth_stall(p);
static void
gen7_pipeline_common_pcb_alloc(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,PS} */
static void
gen7_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VIEWPORT_STATE_POINTERS_{CC,SF_CLIP} */
static void
gen7_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_BLEND_STATE_POINTERS */
static void
gen7_pipeline_vs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const bool emit_3dstate_binding_table = session->binding_table_vs_changed;
/* 3DSTATE_VS */
if (emit_3dstate_vs) {
- const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
+ const int num_samplers = vec->sampler[PIPE_SHADER_VERTEX].count;
- gen6_3DSTATE_VS(&p->cp->builder, ilo->vs, num_samplers);
+ gen6_3DSTATE_VS(&p->cp->builder, vec->vs, num_samplers);
}
}
static void
gen7_pipeline_hs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_HS and 3DSTATE_HS */
static void
gen7_pipeline_te(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_TE */
static void
gen7_pipeline_ds(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_DS and 3DSTATE_DS */
static void
gen7_pipeline_gs(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_GS and 3DSTATE_GS */
static void
gen7_pipeline_sol(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const struct pipe_stream_output_info *so_info;
const struct ilo_shader_state *shader;
bool dirty_sh = false;
- if (ilo->gs) {
- shader = ilo->gs;
+ if (vec->gs) {
+ shader = vec->gs;
dirty_sh = DIRTY(GS);
}
else {
- shader = ilo->vs;
+ shader = vec->vs;
dirty_sh = DIRTY(VS);
}
so_info = ilo_shader_get_kernel_so_info(shader);
- gen6_pipeline_update_max_svbi(p, ilo, session);
+ gen6_pipeline_update_max_svbi(p, vec, session);
/* 3DSTATE_SO_BUFFER */
if ((DIRTY(SO) || dirty_sh || session->batch_bo_changed) &&
- ilo->so.enabled) {
+ vec->so.enabled) {
int i;
- for (i = 0; i < ilo->so.count; i++) {
+ for (i = 0; i < vec->so.count; i++) {
const int stride = so_info->stride[i] * 4; /* in bytes */
int base = 0;
gen7_3DSTATE_SO_BUFFER(&p->cp->builder, i, base, stride,
- ilo->so.states[i]);
+ vec->so.states[i]);
}
for (; i < 4; i++)
}
/* 3DSTATE_SO_DECL_LIST */
- if (dirty_sh && ilo->so.enabled)
+ if (dirty_sh && vec->so.enabled)
gen7_3DSTATE_SO_DECL_LIST(&p->cp->builder, so_info);
/* 3DSTATE_STREAMOUT */
if (DIRTY(SO) || DIRTY(RASTERIZER) || dirty_sh) {
- const unsigned buffer_mask = (1 << ilo->so.count) - 1;
+ const unsigned buffer_mask = (1 << vec->so.count) - 1;
const int output_count = ilo_shader_get_kernel_param(shader,
ILO_KERNEL_OUTPUT_COUNT);
gen7_3DSTATE_STREAMOUT(&p->cp->builder, buffer_mask, output_count,
- ilo->rasterizer->state.rasterizer_discard);
+ vec->rasterizer->state.rasterizer_discard);
}
}
static void
gen7_pipeline_sf(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SBE */
if (DIRTY(RASTERIZER) || DIRTY(FS))
- gen7_3DSTATE_SBE(&p->cp->builder, ilo->rasterizer, ilo->fs);
+ gen7_3DSTATE_SBE(&p->cp->builder, vec->rasterizer, vec->fs);
/* 3DSTATE_SF */
if (DIRTY(RASTERIZER) || DIRTY(FB)) {
- struct pipe_surface *zs = ilo->fb.state.zsbuf;
+ struct pipe_surface *zs = vec->fb.state.zsbuf;
gen7_wa_pipe_control_cs_stall(p, true, true);
- gen7_3DSTATE_SF(&p->cp->builder, ilo->rasterizer,
+ gen7_3DSTATE_SF(&p->cp->builder, vec->rasterizer,
(zs) ? zs->format : PIPE_FORMAT_NONE);
}
}
static void
gen7_pipeline_wm(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DSA) || DIRTY(RASTERIZER)) {
- const bool cc_may_kill = (ilo->dsa->dw_alpha ||
- ilo->blend->alpha_to_coverage);
+ const bool cc_may_kill = (vec->dsa->dw_alpha ||
+ vec->blend->alpha_to_coverage);
- gen7_3DSTATE_WM(&p->cp->builder, ilo->fs,
- ilo->rasterizer, cc_may_kill, 0);
+ gen7_3DSTATE_WM(&p->cp->builder, vec->fs,
+ vec->rasterizer, cc_may_kill, 0);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_PS */
/* 3DSTATE_PS */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) ||
session->kernel_bo_changed) {
- const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
- const bool dual_blend = ilo->blend->dual_blend;
+ const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
+ const bool dual_blend = vec->blend->dual_blend;
if ((ilo_dev_gen(p->dev) == ILO_GEN(7) ||
ilo_dev_gen(p->dev) == ILO_GEN(7.5)) &&
session->hw_ctx_changed)
gen7_wa_pipe_control_ps_max_threads_stall(p);
- gen7_3DSTATE_PS(&p->cp->builder, ilo->fs, num_samplers, dual_blend);
+ gen7_3DSTATE_PS(&p->cp->builder, vec->fs, num_samplers, dual_blend);
}
/* 3DSTATE_SCISSOR_STATE_POINTERS */
const struct ilo_zs_surface *zs;
uint32_t clear_params;
- if (ilo->fb.state.zsbuf) {
+ if (vec->fb.state.zsbuf) {
const struct ilo_surface_cso *surface =
- (const struct ilo_surface_cso *) ilo->fb.state.zsbuf;
+ (const struct ilo_surface_cso *) vec->fb.state.zsbuf;
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(ilo_texture(surface->base.texture),
surface->base.u.tex.level, surface->base.u.tex.first_layer);
clear_params = slice->clear_value;
}
else {
- zs = &ilo->fb.null_zs;
+ zs = &vec->fb.null_zs;
clear_params = 0;
}
static void
gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
gen7_wa_pipe_control_cs_stall(p, true, true);
packed_sample_pos =
- (ilo->fb.num_samples > 4) ? p->packed_sample_position_8x :
- (ilo->fb.num_samples > 1) ? &p->packed_sample_position_4x :
+ (vec->fb.num_samples > 4) ? p->packed_sample_position_8x :
+ (vec->fb.num_samples > 1) ? &p->packed_sample_position_4x :
&p->packed_sample_position_1x;
gen6_3DSTATE_MULTISAMPLE(&p->cp->builder,
- ilo->fb.num_samples, packed_sample_pos,
- ilo->rasterizer->state.half_pixel_center);
+ vec->fb.num_samples, packed_sample_pos,
+ vec->rasterizer->state.half_pixel_center);
gen7_3DSTATE_SAMPLE_MASK(&p->cp->builder,
- (ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1,
- ilo->fb.num_samples);
+ (vec->fb.num_samples > 1) ? vec->sample_mask : 0x1,
+ vec->fb.num_samples);
}
}
static void
gen7_pipeline_vf_draw(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DPRIMITIVE */
- gen7_3DPRIMITIVE(&p->cp->builder, ilo->draw, &ilo->ib);
+ gen7_3DPRIMITIVE(&p->cp->builder, vec->draw, &vec->ib);
p->state.has_gen6_wa_pipe_control = false;
}
static void
gen7_pipeline_commands(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/*
* that of the classic i965 driver. It allows us to compare the command
* streams easily.
*/
- gen6_pipeline_common_select(p, ilo, session);
- gen6_pipeline_common_sip(p, ilo, session);
- gen6_pipeline_vf_statistics(p, ilo, session);
- gen7_pipeline_common_pcb_alloc(p, ilo, session);
- gen6_pipeline_common_base_address(p, ilo, session);
- gen7_pipeline_common_pointers_1(p, ilo, session);
- gen7_pipeline_common_urb(p, ilo, session);
- gen7_pipeline_common_pointers_2(p, ilo, session);
- gen7_pipeline_wm_multisample(p, ilo, session);
- gen7_pipeline_gs(p, ilo, session);
- gen7_pipeline_hs(p, ilo, session);
- gen7_pipeline_te(p, ilo, session);
- gen7_pipeline_ds(p, ilo, session);
- gen7_pipeline_vs(p, ilo, session);
- gen7_pipeline_sol(p, ilo, session);
- gen6_pipeline_clip(p, ilo, session);
- gen7_pipeline_sf(p, ilo, session);
- gen7_pipeline_wm(p, ilo, session);
- gen6_pipeline_wm_raster(p, ilo, session);
- gen6_pipeline_sf_rect(p, ilo, session);
- gen6_pipeline_vf(p, ilo, session);
- gen7_pipeline_vf_draw(p, ilo, session);
+ gen6_pipeline_common_select(p, vec, session);
+ gen6_pipeline_common_sip(p, vec, session);
+ gen6_pipeline_vf_statistics(p, vec, session);
+ gen7_pipeline_common_pcb_alloc(p, vec, session);
+ gen6_pipeline_common_base_address(p, vec, session);
+ gen7_pipeline_common_pointers_1(p, vec, session);
+ gen7_pipeline_common_urb(p, vec, session);
+ gen7_pipeline_common_pointers_2(p, vec, session);
+ gen7_pipeline_wm_multisample(p, vec, session);
+ gen7_pipeline_gs(p, vec, session);
+ gen7_pipeline_hs(p, vec, session);
+ gen7_pipeline_te(p, vec, session);
+ gen7_pipeline_ds(p, vec, session);
+ gen7_pipeline_vs(p, vec, session);
+ gen7_pipeline_sol(p, vec, session);
+ gen6_pipeline_clip(p, vec, session);
+ gen7_pipeline_sf(p, vec, session);
+ gen7_pipeline_wm(p, vec, session);
+ gen6_pipeline_wm_raster(p, vec, session);
+ gen6_pipeline_sf_rect(p, vec, session);
+ gen6_pipeline_vf(p, vec, session);
+ gen7_pipeline_vf_draw(p, vec, session);
}
static void
ilo_3d_pipeline_emit_draw_gen7(struct ilo_3d_pipeline *p,
- const struct ilo_context *ilo)
+ const struct ilo_state_vector *vec)
{
struct gen6_pipeline_session session;
- gen6_pipeline_prepare(p, ilo, &session);
+ gen6_pipeline_prepare(p, vec, &session);
session.emit_draw_states = gen6_pipeline_states;
session.emit_draw_commands = gen7_pipeline_commands;
- gen6_pipeline_draw(p, ilo, &session);
- gen6_pipeline_end(p, ilo, &session);
+ gen6_pipeline_draw(p, vec, &session);
+ gen6_pipeline_end(p, vec, &session);
}
static void
switch (action) {
case ILO_3D_PIPELINE_DRAW:
{
- const struct ilo_context *ilo = arg;
+ const struct ilo_state_vector *ilo = arg;
size = gen7_pipeline_max_command_size(p) +
gen6_pipeline_estimate_state_size(p, ilo);
unsigned stencil)
{
struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo->state_vector;
- if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && ilo->fb.state.zsbuf) {
- if (ilo_blitter_rectlist_clear_zs(ilo->blitter, ilo->fb.state.zsbuf,
+ if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && vec->fb.state.zsbuf) {
+ if (ilo_blitter_rectlist_clear_zs(ilo->blitter, vec->fb.state.zsbuf,
buffers & PIPE_CLEAR_DEPTHSTENCIL, depth, stencil))
buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
#include "ilo_state.h"
#include "ilo_resource.h"
-struct ilo_context;
-
void
ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
struct pipe_resource *res, unsigned level,
static inline void
ilo_blit_resolve_framebuffer(struct ilo_context *ilo)
{
- const struct pipe_framebuffer_state *fb = &ilo->fb.state;
+ struct ilo_state_vector *vec = &ilo->state_vector;
+ const struct pipe_framebuffer_state *fb = &vec->fb.state;
unsigned sh, i;
/* Not all bound views are sampled by the shaders. How do we tell? */
- for (sh = 0; sh < Elements(ilo->view); sh++) {
- for (i = 0; i < ilo->view[sh].count; i++) {
- if (ilo->view[sh].states[i])
- ilo_blit_resolve_view(ilo, ilo->view[sh].states[i]);
+ for (sh = 0; sh < Elements(vec->view); sh++) {
+ for (i = 0; i < vec->view[sh].count; i++) {
+ if (vec->view[sh].states[i])
+ ilo_blit_resolve_view(ilo, vec->view[sh].states[i]);
}
}
#define ILO_BLITTER_H
#include "ilo_common.h"
-#include "ilo_context.h"
#include "ilo_state.h"
enum ilo_blitter_uses {
struct blitter_context;
struct pipe_resource;
struct pipe_surface;
+struct ilo_context;
struct ilo_blitter {
struct ilo_context *ilo;
bool scissor_enable)
{
struct blitter_context *b = blitter->pipe_blitter;
- struct ilo_context *ilo = blitter->ilo;
+ struct ilo_state_vector *vec = &blitter->ilo->state_vector;
+ struct ilo_3d *hw3d = blitter->ilo->hw3d;
/* vertex states */
- util_blitter_save_vertex_buffer_slot(b, ilo->vb.states);
- util_blitter_save_vertex_elements(b, (void *) ilo->ve);
- util_blitter_save_vertex_shader(b, ilo->vs);
- util_blitter_save_geometry_shader(b, ilo->gs);
- util_blitter_save_so_targets(b, ilo->so.count, ilo->so.states);
- util_blitter_save_rasterizer(b, (void *) ilo->rasterizer);
+ util_blitter_save_vertex_buffer_slot(b, vec->vb.states);
+ util_blitter_save_vertex_elements(b, (void *) vec->ve);
+ util_blitter_save_vertex_shader(b, vec->vs);
+ util_blitter_save_geometry_shader(b, vec->gs);
+ util_blitter_save_so_targets(b, vec->so.count, vec->so.states);
+ util_blitter_save_rasterizer(b, (void *) vec->rasterizer);
/* fragment states */
- util_blitter_save_fragment_shader(b, ilo->fs);
- util_blitter_save_depth_stencil_alpha(b, (void *) ilo->dsa);
- util_blitter_save_blend(b, (void *) ilo->blend);
- util_blitter_save_sample_mask(b, ilo->sample_mask);
- util_blitter_save_stencil_ref(b, &ilo->stencil_ref);
- util_blitter_save_viewport(b, &ilo->viewport.viewport0);
+ util_blitter_save_fragment_shader(b, vec->fs);
+ util_blitter_save_depth_stencil_alpha(b, (void *) vec->dsa);
+ util_blitter_save_blend(b, (void *) vec->blend);
+ util_blitter_save_sample_mask(b, vec->sample_mask);
+ util_blitter_save_stencil_ref(b, &vec->stencil_ref);
+ util_blitter_save_viewport(b, &vec->viewport.viewport0);
if (scissor_enable)
- util_blitter_save_scissor(b, &ilo->scissor.scissor0);
+ util_blitter_save_scissor(b, &vec->scissor.scissor0);
switch (op) {
case ILO_BLITTER_PIPE_BLIT:
* util_blitter_copy_texture()
*/
util_blitter_save_fragment_sampler_states(b,
- ilo->sampler[PIPE_SHADER_FRAGMENT].count,
- (void **) ilo->sampler[PIPE_SHADER_FRAGMENT].cso);
+ vec->sampler[PIPE_SHADER_FRAGMENT].count,
+ (void **) vec->sampler[PIPE_SHADER_FRAGMENT].cso);
util_blitter_save_fragment_sampler_views(b,
- ilo->view[PIPE_SHADER_FRAGMENT].count,
- ilo->view[PIPE_SHADER_FRAGMENT].states);
+ vec->view[PIPE_SHADER_FRAGMENT].count,
+ vec->view[PIPE_SHADER_FRAGMENT].states);
- util_blitter_save_framebuffer(b, &ilo->fb.state);
+ util_blitter_save_framebuffer(b, &vec->fb.state);
/* resource_copy_region() or blit() does not honor render condition */
util_blitter_save_render_condition(b,
- ilo->hw3d->render_condition.query,
- ilo->hw3d->render_condition.cond,
- ilo->hw3d->render_condition.mode);
+ hw3d->render_condition.query,
+ hw3d->render_condition.cond,
+ hw3d->render_condition.mode);
break;
case ILO_BLITTER_PIPE_CLEAR:
/*
* we are about to call util_blitter_clear_render_target() or
* util_blitter_clear_depth_stencil()
*/
- util_blitter_save_framebuffer(b, &ilo->fb.state);
+ util_blitter_save_framebuffer(b, &vec->fb.state);
break;
case ILO_BLITTER_PIPE_CLEAR_FB:
/* we are about to call util_blitter_clear() */
const union pipe_color_union *color,
double depth, unsigned stencil)
{
+ struct ilo_state_vector *vec = &blitter->ilo->state_vector;
+
/* TODO we should pause/resume some queries */
ilo_blitter_pipe_begin(blitter, ILO_BLITTER_PIPE_CLEAR_FB, false);
util_blitter_clear(blitter->pipe_blitter,
- blitter->ilo->fb.state.width, blitter->ilo->fb.state.height, 1,
+ vec->fb.state.width, vec->fb.state.height, 1,
buffers, color, depth, stencil);
ilo_blitter_pipe_end(blitter);
{
struct ilo_context *ilo = ilo_context(pipe);
- ilo_cleanup_states(ilo);
+ ilo_state_vector_cleanup(&ilo->state_vector);
if (ilo->uploader)
u_upload_destroy(ilo->uploader);
ilo_init_video_functions(ilo);
ilo_init_gpgpu_functions(ilo);
- ilo_init_states(ilo);
+ ilo_state_vector_init(ilo->dev, &ilo->state_vector);
/*
* These must be called last as u_upload/u_blitter are clients of the pipe
#include "ilo_common.h"
#include "ilo_state.h"
-struct pipe_draw_info;
struct u_upload_mgr;
+
struct intel_winsys;
-struct intel_bo;
struct ilo_3d;
struct ilo_blitter;
struct ilo_cp;
struct ilo_screen;
-struct ilo_shader_state;
+struct ilo_shader_cache;
struct ilo_context {
struct pipe_context base;
struct u_upload_mgr *uploader;
- const struct pipe_draw_info *draw;
- uint32_t dirty;
-
- struct ilo_vb_state vb;
- const struct ilo_ve_state *ve;
- struct ilo_ib_state ib;
-
- struct ilo_shader_state *vs;
- struct ilo_shader_state *gs;
-
- struct ilo_so_state so;
-
- struct pipe_clip_state clip;
- struct ilo_viewport_state viewport;
- struct ilo_scissor_state scissor;
-
- const struct ilo_rasterizer_state *rasterizer;
- struct pipe_poly_stipple poly_stipple;
- unsigned sample_mask;
-
- struct ilo_shader_state *fs;
-
- const struct ilo_dsa_state *dsa;
- struct pipe_stencil_ref stencil_ref;
- const struct ilo_blend_state *blend;
- struct pipe_blend_color blend_color;
- struct ilo_fb_state fb;
-
- /* shader resources */
- struct ilo_sampler_state sampler[PIPE_SHADER_TYPES];
- struct ilo_view_state view[PIPE_SHADER_TYPES];
- struct ilo_cbuf_state cbuf[PIPE_SHADER_TYPES];
- struct ilo_resource_state resource;
-
- /* GPGPU */
- struct ilo_shader_state *cs;
- struct ilo_resource_state cs_resource;
- struct ilo_global_binding global_binding;
+ struct ilo_state_vector state_vector;
};
static inline struct ilo_context *
void
ilo_shader_variant_init(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
- const struct ilo_context *ilo)
+ const struct ilo_state_vector *vec)
{
int num_views, i;
switch (info->type) {
case PIPE_SHADER_VERTEX:
variant->u.vs.rasterizer_discard =
- ilo->rasterizer->state.rasterizer_discard;
+ vec->rasterizer->state.rasterizer_discard;
variant->u.vs.num_ucps =
- util_last_bit(ilo->rasterizer->state.clip_plane_enable);
+ util_last_bit(vec->rasterizer->state.clip_plane_enable);
break;
case PIPE_SHADER_GEOMETRY:
variant->u.gs.rasterizer_discard =
- ilo->rasterizer->state.rasterizer_discard;
- variant->u.gs.num_inputs = ilo->vs->shader->out.count;
- for (i = 0; i < ilo->vs->shader->out.count; i++) {
+ vec->rasterizer->state.rasterizer_discard;
+ variant->u.gs.num_inputs = vec->vs->shader->out.count;
+ for (i = 0; i < vec->vs->shader->out.count; i++) {
variant->u.gs.semantic_names[i] =
- ilo->vs->shader->out.semantic_names[i];
+ vec->vs->shader->out.semantic_names[i];
variant->u.gs.semantic_indices[i] =
- ilo->vs->shader->out.semantic_indices[i];
+ vec->vs->shader->out.semantic_indices[i];
}
break;
case PIPE_SHADER_FRAGMENT:
variant->u.fs.flatshade =
- (info->has_color_interp && ilo->rasterizer->state.flatshade);
+ (info->has_color_interp && vec->rasterizer->state.flatshade);
variant->u.fs.fb_height = (info->has_pos) ?
- ilo->fb.state.height : 1;
- variant->u.fs.num_cbufs = ilo->fb.state.nr_cbufs;
+ vec->fb.state.height : 1;
+ variant->u.fs.num_cbufs = vec->fb.state.nr_cbufs;
break;
default:
assert(!"unknown shader type");
}
/* use PCB unless constant buffer 0 is not in user buffer */
- if ((ilo->cbuf[info->type].enabled_mask & 0x1) &&
- !ilo->cbuf[info->type].cso[0].user_buffer)
+ if ((vec->cbuf[info->type].enabled_mask & 0x1) &&
+ !vec->cbuf[info->type].cso[0].user_buffer)
variant->use_pcb = false;
else
variant->use_pcb = true;
- num_views = ilo->view[info->type].count;
+ num_views = vec->view[info->type].count;
assert(info->num_samplers <= num_views);
variant->num_sampler_views = info->num_samplers;
for (i = 0; i < info->num_samplers; i++) {
- const struct pipe_sampler_view *view = ilo->view[info->type].states[i];
- const struct ilo_sampler_cso *sampler = ilo->sampler[info->type].cso[i];
+ const struct pipe_sampler_view *view = vec->view[info->type].states[i];
+ const struct ilo_sampler_cso *sampler = vec->sampler[info->type].cso[i];
if (view) {
variant->sampler_view_swizzles[i].r = view->swizzle_r;
static void
ilo_shader_variant_guess(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
- const struct ilo_context *ilo)
+ const struct ilo_state_vector *vec)
{
int i;
case PIPE_SHADER_FRAGMENT:
variant->u.fs.flatshade = false;
variant->u.fs.fb_height = (info->has_pos) ?
- ilo->fb.state.height : 1;
+ vec->fb.state.height : 1;
variant->u.fs.num_cbufs = 1;
break;
default:
* Create a shader state.
*/
static struct ilo_shader_state *
-ilo_shader_state_create(const struct ilo_context *ilo,
+ilo_shader_state_create(const struct ilo_dev_info *dev,
+ const struct ilo_state_vector *vec,
int type, const void *templ)
{
struct ilo_shader_state *state;
if (!state)
return NULL;
- state->info.dev = ilo->dev;
+ state->info.dev = dev;
state->info.type = type;
if (type == PIPE_SHADER_COMPUTE) {
ilo_shader_info_parse_tokens(&state->info);
/* guess and compile now */
- ilo_shader_variant_guess(&variant, &state->info, ilo);
+ ilo_shader_variant_guess(&variant, &state->info, vec);
if (!ilo_shader_state_use_variant(state, &variant)) {
ilo_shader_destroy(state);
return NULL;
struct ilo_shader_state *
ilo_shader_create_vs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile)
+ const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
- shader = ilo_shader_state_create(precompile, PIPE_SHADER_VERTEX, state);
+ shader = ilo_shader_state_create(dev, precompile,
+ PIPE_SHADER_VERTEX, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_VS |
struct ilo_shader_state *
ilo_shader_create_gs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile)
+ const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
- shader = ilo_shader_state_create(precompile, PIPE_SHADER_GEOMETRY, state);
+ shader = ilo_shader_state_create(dev, precompile,
+ PIPE_SHADER_GEOMETRY, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_GS |
struct ilo_shader_state *
ilo_shader_create_fs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile)
+ const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
- shader = ilo_shader_state_create(precompile, PIPE_SHADER_FRAGMENT, state);
+ shader = ilo_shader_state_create(dev, precompile,
+ PIPE_SHADER_FRAGMENT, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_FS |
struct ilo_shader_state *
ilo_shader_create_cs(const struct ilo_dev_info *dev,
const struct pipe_compute_state *state,
- const struct ilo_context *precompile)
+ const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
- shader = ilo_shader_state_create(precompile, PIPE_SHADER_COMPUTE, state);
+ shader = ilo_shader_state_create(dev, precompile,
+ PIPE_SHADER_COMPUTE, state);
shader->info.non_orthogonal_states = 0;
*/
bool
ilo_shader_select_kernel(struct ilo_shader_state *shader,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
uint32_t dirty)
{
const struct ilo_shader * const cur = shader->shader;
if (!(shader->info.non_orthogonal_states & dirty))
return false;
- ilo_shader_variant_init(&variant, &shader->info, ilo);
+ ilo_shader_variant_init(&variant, &shader->info, vec);
ilo_shader_state_use_variant(shader, &variant);
return (shader->shader != cur);
struct intel_bo;
struct ilo_builder;
-struct ilo_context;
struct ilo_rasterizer_state;
struct ilo_shader_cache;
struct ilo_shader_state;
struct ilo_shader_cso;
+struct ilo_state_vector;
struct ilo_shader_cache *
ilo_shader_cache_create(void);
struct ilo_shader_state *
ilo_shader_create_vs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile);
+ const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_gs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile);
+ const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_fs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
- const struct ilo_context *precompile);
+ const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_cs(const struct ilo_dev_info *dev,
const struct pipe_compute_state *state,
- const struct ilo_context *precompile);
+ const struct ilo_state_vector *precompile);
void
ilo_shader_destroy(struct ilo_shader_state *shader);
bool
ilo_shader_select_kernel(struct ilo_shader_state *shader,
- const struct ilo_context *ilo,
+ const struct ilo_state_vector *vec,
uint32_t dirty);
bool
#include "ilo_state_gen.h"
static void
-finalize_shader_states(struct ilo_context *ilo)
+finalize_shader_states(struct ilo_state_vector *vec)
{
unsigned type;
switch (type) {
case PIPE_SHADER_VERTEX:
- shader = ilo->vs;
+ shader = vec->vs;
state = ILO_DIRTY_VS;
break;
case PIPE_SHADER_GEOMETRY:
- shader = ilo->gs;
+ shader = vec->gs;
state = ILO_DIRTY_GS;
break;
case PIPE_SHADER_FRAGMENT:
- shader = ilo->fs;
+ shader = vec->fs;
state = ILO_DIRTY_FS;
break;
default:
continue;
/* compile if the shader or the states it depends on changed */
- if (ilo->dirty & state) {
- ilo_shader_select_kernel(shader, ilo, ILO_DIRTY_ALL);
+ if (vec->dirty & state) {
+ ilo_shader_select_kernel(shader, vec, ILO_DIRTY_ALL);
}
- else if (ilo_shader_select_kernel(shader, ilo, ilo->dirty)) {
+ else if (ilo_shader_select_kernel(shader, vec, vec->dirty)) {
/* mark the state dirty if a new kernel is selected */
- ilo->dirty |= state;
+ vec->dirty |= state;
}
/* need to setup SBE for FS */
- if (type == PIPE_SHADER_FRAGMENT && ilo->dirty &
+ if (type == PIPE_SHADER_FRAGMENT && vec->dirty &
(state | ILO_DIRTY_GS | ILO_DIRTY_VS | ILO_DIRTY_RASTERIZER)) {
if (ilo_shader_select_kernel_routing(shader,
- (ilo->gs) ? ilo->gs : ilo->vs, ilo->rasterizer))
- ilo->dirty |= state;
+ (vec->gs) ? vec->gs : vec->vs, vec->rasterizer))
+ vec->dirty |= state;
}
}
}
util_format_get_blocksize(elem_format), elem_format,
false, false, &cbuf->cso[i].surface);
- ilo->dirty |= ILO_DIRTY_CBUF;
+ ilo->state_vector.dirty |= ILO_DIRTY_CBUF;
}
}
static void
finalize_constant_buffers(struct ilo_context *ilo)
{
- if (ilo->dirty & (ILO_DIRTY_CBUF | ILO_DIRTY_VS))
- finalize_cbuf_state(ilo, &ilo->cbuf[PIPE_SHADER_VERTEX], ilo->vs);
+ struct ilo_state_vector *vec = &ilo->state_vector;
- if (ilo->dirty & (ILO_DIRTY_CBUF | ILO_DIRTY_FS))
- finalize_cbuf_state(ilo, &ilo->cbuf[PIPE_SHADER_FRAGMENT], ilo->fs);
+ if (vec->dirty & (ILO_DIRTY_CBUF | ILO_DIRTY_VS))
+ finalize_cbuf_state(ilo, &vec->cbuf[PIPE_SHADER_VERTEX], vec->vs);
+
+ if (ilo->state_vector.dirty & (ILO_DIRTY_CBUF | ILO_DIRTY_FS))
+ finalize_cbuf_state(ilo, &vec->cbuf[PIPE_SHADER_FRAGMENT], vec->fs);
}
static void
finalize_index_buffer(struct ilo_context *ilo)
{
- const bool need_upload = (ilo->draw->indexed &&
- (ilo->ib.user_buffer || ilo->ib.offset % ilo->ib.index_size));
+ struct ilo_state_vector *vec = &ilo->state_vector;
+ const bool need_upload = (vec->draw->indexed &&
+ (vec->ib.user_buffer || vec->ib.offset % vec->ib.index_size));
struct pipe_resource *current_hw_res = NULL;
- if (!(ilo->dirty & ILO_DIRTY_IB) && !need_upload)
+ if (!(vec->dirty & ILO_DIRTY_IB) && !need_upload)
return;
- pipe_resource_reference(¤t_hw_res, ilo->ib.hw_resource);
+ pipe_resource_reference(¤t_hw_res, vec->ib.hw_resource);
if (need_upload) {
- const unsigned offset = ilo->ib.index_size * ilo->draw->start;
- const unsigned size = ilo->ib.index_size * ilo->draw->count;
+ const unsigned offset = vec->ib.index_size * vec->draw->start;
+ const unsigned size = vec->ib.index_size * vec->draw->count;
unsigned hw_offset;
- if (ilo->ib.user_buffer) {
+ if (vec->ib.user_buffer) {
u_upload_data(ilo->uploader, 0, size,
- ilo->ib.user_buffer + offset, &hw_offset, &ilo->ib.hw_resource);
+ vec->ib.user_buffer + offset, &hw_offset, &vec->ib.hw_resource);
}
else {
- u_upload_buffer(ilo->uploader, 0, ilo->ib.offset + offset, size,
- ilo->ib.buffer, &hw_offset, &ilo->ib.hw_resource);
+ u_upload_buffer(ilo->uploader, 0, vec->ib.offset + offset, size,
+ vec->ib.buffer, &hw_offset, &vec->ib.hw_resource);
}
/* the HW offset should be aligned */
- assert(hw_offset % ilo->ib.index_size == 0);
- ilo->ib.draw_start_offset = hw_offset / ilo->ib.index_size;
+ assert(hw_offset % vec->ib.index_size == 0);
+ vec->ib.draw_start_offset = hw_offset / vec->ib.index_size;
/*
- * INDEX[ilo->draw->start] in the original buffer is INDEX[0] in the HW
+ * INDEX[vec->draw->start] in the original buffer is INDEX[0] in the HW
* resource
*/
- ilo->ib.draw_start_offset -= ilo->draw->start;
+ vec->ib.draw_start_offset -= vec->draw->start;
}
else {
- pipe_resource_reference(&ilo->ib.hw_resource, ilo->ib.buffer);
+ pipe_resource_reference(&vec->ib.hw_resource, vec->ib.buffer);
/* note that index size may be zero when the draw is not indexed */
- if (ilo->draw->indexed)
- ilo->ib.draw_start_offset = ilo->ib.offset / ilo->ib.index_size;
+ if (vec->draw->indexed)
+ vec->ib.draw_start_offset = vec->ib.offset / vec->ib.index_size;
else
- ilo->ib.draw_start_offset = 0;
+ vec->ib.draw_start_offset = 0;
}
/* treat the IB as clean if the HW states do not change */
- if (ilo->ib.hw_resource == current_hw_res &&
- ilo->ib.hw_index_size == ilo->ib.index_size)
- ilo->dirty &= ~ILO_DIRTY_IB;
+ if (vec->ib.hw_resource == current_hw_res &&
+ vec->ib.hw_index_size == vec->ib.index_size)
+ vec->dirty &= ~ILO_DIRTY_IB;
else
- ilo->ib.hw_index_size = ilo->ib.index_size;
+ vec->ib.hw_index_size = vec->ib.index_size;
pipe_resource_reference(¤t_hw_res, NULL);
}
ilo_finalize_3d_states(struct ilo_context *ilo,
const struct pipe_draw_info *draw)
{
- ilo->draw = draw;
+ ilo->state_vector.draw = draw;
- finalize_shader_states(ilo);
+ finalize_shader_states(&ilo->state_vector);
finalize_constant_buffers(ilo);
finalize_index_buffer(ilo);
ilo_create_blend_state(struct pipe_context *pipe,
const struct pipe_blend_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_blend_state *blend;
blend = MALLOC_STRUCT(ilo_blend_state);
assert(blend);
- ilo_gpe_init_blend(ilo->dev, state, blend);
+ ilo_gpe_init_blend(dev, state, blend);
return blend;
}
static void
ilo_bind_blend_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->blend = state;
+ vec->blend = state;
- ilo->dirty |= ILO_DIRTY_BLEND;
+ vec->dirty |= ILO_DIRTY_BLEND;
}
static void
ilo_create_sampler_state(struct pipe_context *pipe,
const struct pipe_sampler_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_sampler_cso *sampler;
sampler = MALLOC_STRUCT(ilo_sampler_cso);
assert(sampler);
- ilo_gpe_init_sampler_cso(ilo->dev, state, sampler);
+ ilo_gpe_init_sampler_cso(dev, state, sampler);
return sampler;
}
ilo_bind_sampler_states(struct pipe_context *pipe, unsigned shader,
unsigned start, unsigned count, void **samplers)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_sampler_state *dst = &ilo->sampler[shader];
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_sampler_state *dst = &vec->sampler[shader];
bool changed = false;
unsigned i;
if (changed) {
switch (shader) {
case PIPE_SHADER_VERTEX:
- ilo->dirty |= ILO_DIRTY_SAMPLER_VS;
+ vec->dirty |= ILO_DIRTY_SAMPLER_VS;
break;
case PIPE_SHADER_GEOMETRY:
- ilo->dirty |= ILO_DIRTY_SAMPLER_GS;
+ vec->dirty |= ILO_DIRTY_SAMPLER_GS;
break;
case PIPE_SHADER_FRAGMENT:
- ilo->dirty |= ILO_DIRTY_SAMPLER_FS;
+ vec->dirty |= ILO_DIRTY_SAMPLER_FS;
break;
case PIPE_SHADER_COMPUTE:
- ilo->dirty |= ILO_DIRTY_SAMPLER_CS;
+ vec->dirty |= ILO_DIRTY_SAMPLER_CS;
break;
}
}
ilo_create_rasterizer_state(struct pipe_context *pipe,
const struct pipe_rasterizer_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_rasterizer_state *rast;
rast = MALLOC_STRUCT(ilo_rasterizer_state);
assert(rast);
rast->state = *state;
- ilo_gpe_init_rasterizer(ilo->dev, state, rast);
+ ilo_gpe_init_rasterizer(dev, state, rast);
return rast;
}
static void
ilo_bind_rasterizer_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->rasterizer = state;
+ vec->rasterizer = state;
- ilo->dirty |= ILO_DIRTY_RASTERIZER;
+ vec->dirty |= ILO_DIRTY_RASTERIZER;
}
static void
ilo_create_depth_stencil_alpha_state(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_dsa_state *dsa;
dsa = MALLOC_STRUCT(ilo_dsa_state);
assert(dsa);
- ilo_gpe_init_dsa(ilo->dev, state, dsa);
+ ilo_gpe_init_dsa(dev, state, dsa);
return dsa;
}
static void
ilo_bind_depth_stencil_alpha_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->dsa = state;
+ vec->dsa = state;
- ilo->dirty |= ILO_DIRTY_DSA;
+ vec->dirty |= ILO_DIRTY_DSA;
}
static void
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_shader_state *shader;
- shader = ilo_shader_create_fs(ilo->dev, state, ilo);
+ shader = ilo_shader_create_fs(ilo->dev, state, &ilo->state_vector);
assert(shader);
ilo_shader_cache_add(ilo->shader_cache, shader);
static void
ilo_bind_fs_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->fs = state;
+ vec->fs = state;
- ilo->dirty |= ILO_DIRTY_FS;
+ vec->dirty |= ILO_DIRTY_FS;
}
static void
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_shader_state *shader;
- shader = ilo_shader_create_vs(ilo->dev, state, ilo);
+ shader = ilo_shader_create_vs(ilo->dev, state, &ilo->state_vector);
assert(shader);
ilo_shader_cache_add(ilo->shader_cache, shader);
static void
ilo_bind_vs_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->vs = state;
+ vec->vs = state;
- ilo->dirty |= ILO_DIRTY_VS;
+ vec->dirty |= ILO_DIRTY_VS;
}
static void
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_shader_state *shader;
- shader = ilo_shader_create_gs(ilo->dev, state, ilo);
+ shader = ilo_shader_create_gs(ilo->dev, state, &ilo->state_vector);
assert(shader);
ilo_shader_cache_add(ilo->shader_cache, shader);
static void
ilo_bind_gs_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
/* util_blitter may set this unnecessarily */
- if (ilo->gs == state)
+ if (vec->gs == state)
return;
- ilo->gs = state;
+ vec->gs = state;
- ilo->dirty |= ILO_DIRTY_GS;
+ vec->dirty |= ILO_DIRTY_GS;
}
static void
unsigned num_elements,
const struct pipe_vertex_element *elements)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_ve_state *ve;
ve = MALLOC_STRUCT(ilo_ve_state);
assert(ve);
- ilo_gpe_init_ve(ilo->dev, num_elements, elements, ve);
+ ilo_gpe_init_ve(dev, num_elements, elements, ve);
return ve;
}
static void
ilo_bind_vertex_elements_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->ve = state;
+ vec->ve = state;
- ilo->dirty |= ILO_DIRTY_VE;
+ vec->dirty |= ILO_DIRTY_VE;
}
static void
ilo_set_blend_color(struct pipe_context *pipe,
const struct pipe_blend_color *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->blend_color = *state;
+ vec->blend_color = *state;
- ilo->dirty |= ILO_DIRTY_BLEND_COLOR;
+ vec->dirty |= ILO_DIRTY_BLEND_COLOR;
}
static void
ilo_set_stencil_ref(struct pipe_context *pipe,
const struct pipe_stencil_ref *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
/* util_blitter may set this unnecessarily */
- if (!memcmp(&ilo->stencil_ref, state, sizeof(*state)))
+ if (!memcmp(&vec->stencil_ref, state, sizeof(*state)))
return;
- ilo->stencil_ref = *state;
+ vec->stencil_ref = *state;
- ilo->dirty |= ILO_DIRTY_STENCIL_REF;
+ vec->dirty |= ILO_DIRTY_STENCIL_REF;
}
static void
ilo_set_sample_mask(struct pipe_context *pipe,
unsigned sample_mask)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
/* util_blitter may set this unnecessarily */
- if (ilo->sample_mask == sample_mask)
+ if (vec->sample_mask == sample_mask)
return;
- ilo->sample_mask = sample_mask;
+ vec->sample_mask = sample_mask;
- ilo->dirty |= ILO_DIRTY_SAMPLE_MASK;
+ vec->dirty |= ILO_DIRTY_SAMPLE_MASK;
}
static void
ilo_set_clip_state(struct pipe_context *pipe,
const struct pipe_clip_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->clip = *state;
+ vec->clip = *state;
- ilo->dirty |= ILO_DIRTY_CLIP;
+ vec->dirty |= ILO_DIRTY_CLIP;
}
static void
uint shader, uint index,
struct pipe_constant_buffer *buf)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_cbuf_state *cbuf = &ilo->cbuf[shader];
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_cbuf_state *cbuf = &vec->cbuf[shader];
const unsigned count = 1;
unsigned i;
- assert(shader < Elements(ilo->cbuf));
- assert(index + count <= Elements(ilo->cbuf[shader].cso));
+ assert(shader < Elements(vec->cbuf));
+ assert(index + count <= Elements(vec->cbuf[shader].cso));
if (buf) {
for (i = 0; i < count; i++) {
const enum pipe_format elem_format =
PIPE_FORMAT_R32G32B32A32_FLOAT;
- ilo_gpe_init_view_surface_for_buffer(ilo->dev,
+ ilo_gpe_init_view_surface_for_buffer(dev,
ilo_buffer(buf[i].buffer),
buf[i].buffer_offset, buf[i].buffer_size,
util_format_get_blocksize(elem_format), elem_format,
}
}
- ilo->dirty |= ILO_DIRTY_CBUF;
+ vec->dirty |= ILO_DIRTY_CBUF;
}
static void
ilo_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo_gpe_set_fb(ilo->dev, state, &ilo->fb);
+ ilo_gpe_set_fb(dev, state, &vec->fb);
- ilo->dirty |= ILO_DIRTY_FB;
+ vec->dirty |= ILO_DIRTY_FB;
}
static void
ilo_set_polygon_stipple(struct pipe_context *pipe,
const struct pipe_poly_stipple *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->poly_stipple = *state;
+ vec->poly_stipple = *state;
- ilo->dirty |= ILO_DIRTY_POLY_STIPPLE;
+ vec->dirty |= ILO_DIRTY_POLY_STIPPLE;
}
static void
unsigned num_scissors,
const struct pipe_scissor_state *scissors)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo_gpe_set_scissor(ilo->dev, start_slot, num_scissors,
- scissors, &ilo->scissor);
+ ilo_gpe_set_scissor(dev, start_slot, num_scissors,
+ scissors, &vec->scissor);
- ilo->dirty |= ILO_DIRTY_SCISSOR;
+ vec->dirty |= ILO_DIRTY_SCISSOR;
}
static void
unsigned num_viewports,
const struct pipe_viewport_state *viewports)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
if (viewports) {
unsigned i;
for (i = 0; i < num_viewports; i++) {
- ilo_gpe_set_viewport_cso(ilo->dev, &viewports[i],
- &ilo->viewport.cso[start_slot + i]);
+ ilo_gpe_set_viewport_cso(dev, &viewports[i],
+ &vec->viewport.cso[start_slot + i]);
}
- if (ilo->viewport.count < start_slot + num_viewports)
- ilo->viewport.count = start_slot + num_viewports;
+ if (vec->viewport.count < start_slot + num_viewports)
+ vec->viewport.count = start_slot + num_viewports;
/* need to save viewport 0 for util_blitter */
if (!start_slot && num_viewports)
- ilo->viewport.viewport0 = viewports[0];
+ vec->viewport.viewport0 = viewports[0];
}
else {
- if (ilo->viewport.count <= start_slot + num_viewports &&
- ilo->viewport.count > start_slot)
- ilo->viewport.count = start_slot;
+ if (vec->viewport.count <= start_slot + num_viewports &&
+ vec->viewport.count > start_slot)
+ vec->viewport.count = start_slot;
}
- ilo->dirty |= ILO_DIRTY_VIEWPORT;
+ vec->dirty |= ILO_DIRTY_VIEWPORT;
}
static void
unsigned start, unsigned count,
struct pipe_sampler_view **views)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_view_state *dst = &ilo->view[shader];
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_view_state *dst = &vec->view[shader];
unsigned i;
assert(start + count <= Elements(dst->states));
switch (shader) {
case PIPE_SHADER_VERTEX:
- ilo->dirty |= ILO_DIRTY_VIEW_VS;
+ vec->dirty |= ILO_DIRTY_VIEW_VS;
break;
case PIPE_SHADER_GEOMETRY:
- ilo->dirty |= ILO_DIRTY_VIEW_GS;
+ vec->dirty |= ILO_DIRTY_VIEW_GS;
break;
case PIPE_SHADER_FRAGMENT:
- ilo->dirty |= ILO_DIRTY_VIEW_FS;
+ vec->dirty |= ILO_DIRTY_VIEW_FS;
break;
case PIPE_SHADER_COMPUTE:
- ilo->dirty |= ILO_DIRTY_VIEW_CS;
+ vec->dirty |= ILO_DIRTY_VIEW_CS;
break;
}
}
unsigned start, unsigned count,
struct pipe_surface **surfaces)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_resource_state *dst = &ilo->resource;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_resource_state *dst = &vec->resource;
unsigned i;
assert(start + count <= Elements(dst->states));
dst->count = count;
}
- ilo->dirty |= ILO_DIRTY_RESOURCE;
+ vec->dirty |= ILO_DIRTY_RESOURCE;
}
static void
unsigned start_slot, unsigned num_buffers,
const struct pipe_vertex_buffer *buffers)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
unsigned i;
/* no PIPE_CAP_USER_VERTEX_BUFFERS */
assert(!buffers[i].user_buffer);
}
- util_set_vertex_buffers_mask(ilo->vb.states,
- &ilo->vb.enabled_mask, buffers, start_slot, num_buffers);
+ util_set_vertex_buffers_mask(vec->vb.states,
+ &vec->vb.enabled_mask, buffers, start_slot, num_buffers);
- ilo->dirty |= ILO_DIRTY_VB;
+ vec->dirty |= ILO_DIRTY_VB;
}
static void
ilo_set_index_buffer(struct pipe_context *pipe,
const struct pipe_index_buffer *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
if (state) {
- pipe_resource_reference(&ilo->ib.buffer, state->buffer);
- ilo->ib.user_buffer = state->user_buffer;
- ilo->ib.offset = state->offset;
- ilo->ib.index_size = state->index_size;
+ pipe_resource_reference(&vec->ib.buffer, state->buffer);
+ vec->ib.user_buffer = state->user_buffer;
+ vec->ib.offset = state->offset;
+ vec->ib.index_size = state->index_size;
}
else {
- pipe_resource_reference(&ilo->ib.buffer, NULL);
- ilo->ib.user_buffer = NULL;
- ilo->ib.offset = 0;
- ilo->ib.index_size = 0;
+ pipe_resource_reference(&vec->ib.buffer, NULL);
+ vec->ib.user_buffer = NULL;
+ vec->ib.offset = 0;
+ vec->ib.index_size = 0;
}
- ilo->dirty |= ILO_DIRTY_IB;
+ vec->dirty |= ILO_DIRTY_IB;
}
static struct pipe_stream_output_target *
struct pipe_stream_output_target **targets,
const unsigned *offset)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
unsigned i;
unsigned append_bitmask = 0;
num_targets = 0;
/* util_blitter may set this unnecessarily */
- if (!ilo->so.count && !num_targets)
+ if (!vec->so.count && !num_targets)
return;
for (i = 0; i < num_targets; i++) {
- pipe_so_target_reference(&ilo->so.states[i], targets[i]);
+ pipe_so_target_reference(&vec->so.states[i], targets[i]);
if (offset[i] == (unsigned)-1)
append_bitmask |= 1 << i;
}
- for (; i < ilo->so.count; i++)
- pipe_so_target_reference(&ilo->so.states[i], NULL);
+ for (; i < vec->so.count; i++)
+ pipe_so_target_reference(&vec->so.states[i], NULL);
- ilo->so.count = num_targets;
- ilo->so.append_bitmask = append_bitmask;
+ vec->so.count = num_targets;
+ vec->so.append_bitmask = append_bitmask;
- ilo->so.enabled = (ilo->so.count > 0);
+ vec->so.enabled = (vec->so.count > 0);
- ilo->dirty |= ILO_DIRTY_SO;
+ vec->dirty |= ILO_DIRTY_SO;
}
static void
struct pipe_resource *res,
const struct pipe_sampler_view *templ)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_view_cso *view;
view = MALLOC_STRUCT(ilo_view_cso);
const unsigned first_elem = templ->u.buf.first_element;
const unsigned num_elems = templ->u.buf.last_element - first_elem + 1;
- ilo_gpe_init_view_surface_for_buffer(ilo->dev, ilo_buffer(res),
+ ilo_gpe_init_view_surface_for_buffer(dev, ilo_buffer(res),
first_elem * elem_size, num_elems * elem_size,
elem_size, templ->format, false, false, &view->surface);
}
"not created for sampling\n");
}
- ilo_gpe_init_view_surface_for_texture(ilo->dev, tex,
+ ilo_gpe_init_view_surface_for_texture(dev, tex,
templ->format,
templ->u.tex.first_level,
templ->u.tex.last_level - templ->u.tex.first_level + 1,
struct pipe_resource *res,
const struct pipe_surface *templ)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ const struct ilo_dev_info *dev = ilo_context(pipe)->dev;
struct ilo_surface_cso *surf;
surf = MALLOC_STRUCT(ilo_surface_cso);
* classic i965 sets render_cache_rw for constant buffers and sol
* surfaces but not render buffers. Why?
*/
- ilo_gpe_init_view_surface_for_texture(ilo->dev, ilo_texture(res),
+ ilo_gpe_init_view_surface_for_texture(dev, ilo_texture(res),
templ->format, templ->u.tex.level, 1,
templ->u.tex.first_layer,
templ->u.tex.last_layer - templ->u.tex.first_layer + 1,
else {
assert(res->target != PIPE_BUFFER);
- ilo_gpe_init_zs_surface(ilo->dev, ilo_texture(res),
+ ilo_gpe_init_zs_surface(dev, ilo_texture(res),
templ->format, templ->u.tex.level,
templ->u.tex.first_layer,
templ->u.tex.last_layer - templ->u.tex.first_layer + 1,
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_shader_state *shader;
- shader = ilo_shader_create_cs(ilo->dev, state, ilo);
+ shader = ilo_shader_create_cs(ilo->dev, state, &ilo->state_vector);
assert(shader);
ilo_shader_cache_add(ilo->shader_cache, shader);
static void
ilo_bind_compute_state(struct pipe_context *pipe, void *state)
{
- struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
- ilo->cs = state;
+ vec->cs = state;
- ilo->dirty |= ILO_DIRTY_CS;
+ vec->dirty |= ILO_DIRTY_CS;
}
static void
unsigned start, unsigned count,
struct pipe_surface **surfaces)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_resource_state *dst = &ilo->cs_resource;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_resource_state *dst = &vec->cs_resource;
unsigned i;
assert(start + count <= Elements(dst->states));
dst->count = count;
}
- ilo->dirty |= ILO_DIRTY_CS_RESOURCE;
+ vec->dirty |= ILO_DIRTY_CS_RESOURCE;
}
static void
struct pipe_resource **resources,
uint32_t **handles)
{
- struct ilo_context *ilo = ilo_context(pipe);
- struct ilo_global_binding *dst = &ilo->global_binding;
+ struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
+ struct ilo_global_binding *dst = &vec->global_binding;
unsigned i;
assert(start + count <= Elements(dst->resources));
dst->count = count;
}
- ilo->dirty |= ILO_DIRTY_GLOBAL_BINDING;
+ vec->dirty |= ILO_DIRTY_GLOBAL_BINDING;
}
/**
}
void
-ilo_init_states(struct ilo_context *ilo)
+ilo_state_vector_init(const struct ilo_dev_info *dev,
+ struct ilo_state_vector *vec)
{
- ilo_gpe_set_scissor_null(ilo->dev, &ilo->scissor);
+ ilo_gpe_set_scissor_null(dev, &vec->scissor);
- ilo_gpe_init_zs_surface(ilo->dev, NULL, PIPE_FORMAT_NONE,
- 0, 0, 1, &ilo->fb.null_zs);
+ ilo_gpe_init_zs_surface(dev, NULL, PIPE_FORMAT_NONE,
+ 0, 0, 1, &vec->fb.null_zs);
- ilo->dirty = ILO_DIRTY_ALL;
+ vec->dirty = ILO_DIRTY_ALL;
}
void
-ilo_cleanup_states(struct ilo_context *ilo)
+ilo_state_vector_cleanup(struct ilo_state_vector *vec)
{
unsigned i, sh;
- for (i = 0; i < Elements(ilo->vb.states); i++) {
- if (ilo->vb.enabled_mask & (1 << i))
- pipe_resource_reference(&ilo->vb.states[i].buffer, NULL);
+ for (i = 0; i < Elements(vec->vb.states); i++) {
+ if (vec->vb.enabled_mask & (1 << i))
+ pipe_resource_reference(&vec->vb.states[i].buffer, NULL);
}
- pipe_resource_reference(&ilo->ib.buffer, NULL);
- pipe_resource_reference(&ilo->ib.hw_resource, NULL);
+ pipe_resource_reference(&vec->ib.buffer, NULL);
+ pipe_resource_reference(&vec->ib.hw_resource, NULL);
- for (i = 0; i < ilo->so.count; i++)
- pipe_so_target_reference(&ilo->so.states[i], NULL);
+ for (i = 0; i < vec->so.count; i++)
+ pipe_so_target_reference(&vec->so.states[i], NULL);
for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) {
- for (i = 0; i < ilo->view[sh].count; i++) {
- struct pipe_sampler_view *view = ilo->view[sh].states[i];
+ for (i = 0; i < vec->view[sh].count; i++) {
+ struct pipe_sampler_view *view = vec->view[sh].states[i];
pipe_sampler_view_reference(&view, NULL);
}
- for (i = 0; i < Elements(ilo->cbuf[sh].cso); i++) {
- struct ilo_cbuf_cso *cbuf = &ilo->cbuf[sh].cso[i];
+ for (i = 0; i < Elements(vec->cbuf[sh].cso); i++) {
+ struct ilo_cbuf_cso *cbuf = &vec->cbuf[sh].cso[i];
pipe_resource_reference(&cbuf->resource, NULL);
}
}
- for (i = 0; i < ilo->resource.count; i++)
- pipe_surface_reference(&ilo->resource.states[i], NULL);
+ for (i = 0; i < vec->resource.count; i++)
+ pipe_surface_reference(&vec->resource.states[i], NULL);
- for (i = 0; i < ilo->fb.state.nr_cbufs; i++)
- pipe_surface_reference(&ilo->fb.state.cbufs[i], NULL);
+ for (i = 0; i < vec->fb.state.nr_cbufs; i++)
+ pipe_surface_reference(&vec->fb.state.cbufs[i], NULL);
- if (ilo->fb.state.zsbuf)
- pipe_surface_reference(&ilo->fb.state.zsbuf, NULL);
+ if (vec->fb.state.zsbuf)
+ pipe_surface_reference(&vec->fb.state.zsbuf, NULL);
- for (i = 0; i < ilo->cs_resource.count; i++)
- pipe_surface_reference(&ilo->cs_resource.states[i], NULL);
+ for (i = 0; i < vec->cs_resource.count; i++)
+ pipe_surface_reference(&vec->cs_resource.states[i], NULL);
- for (i = 0; i < ilo->global_binding.count; i++)
- pipe_resource_reference(&ilo->global_binding.resources[i], NULL);
+ for (i = 0; i < vec->global_binding.count; i++)
+ pipe_resource_reference(&vec->global_binding.resources[i], NULL);
}
/**
* Mark all states that have the resource dirty.
*/
void
-ilo_mark_states_with_resource_renamed(struct ilo_context *ilo,
- struct pipe_resource *res)
+ilo_state_vector_resource_renamed(struct ilo_state_vector *vec,
+ struct pipe_resource *res)
{
struct intel_bo *bo = ilo_resource_get_bo(res);
uint32_t states = 0;
unsigned sh, i;
if (res->target == PIPE_BUFFER) {
- uint32_t vb_mask = ilo->vb.enabled_mask;
+ uint32_t vb_mask = vec->vb.enabled_mask;
while (vb_mask) {
const unsigned idx = u_bit_scan(&vb_mask);
- if (ilo->vb.states[idx].buffer == res) {
+ if (vec->vb.states[idx].buffer == res) {
states |= ILO_DIRTY_VB;
break;
}
}
- if (ilo->ib.buffer == res) {
+ if (vec->ib.buffer == res) {
states |= ILO_DIRTY_IB;
/*
* contents of the IB has changed. Here, we set the index size to an
* invalid value to avoid the optimization.
*/
- ilo->ib.hw_index_size = 0;
+ vec->ib.hw_index_size = 0;
}
- for (i = 0; i < ilo->so.count; i++) {
- if (ilo->so.states[i]->buffer == res) {
+ for (i = 0; i < vec->so.count; i++) {
+ if (vec->so.states[i]->buffer == res) {
states |= ILO_DIRTY_SO;
break;
}
}
for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) {
- for (i = 0; i < ilo->view[sh].count; i++) {
- struct ilo_view_cso *cso = (struct ilo_view_cso *) ilo->view[sh].states[i];
+ for (i = 0; i < vec->view[sh].count; i++) {
+ struct ilo_view_cso *cso = (struct ilo_view_cso *) vec->view[sh].states[i];
if (cso->base.texture == res) {
static const unsigned view_dirty_bits[PIPE_SHADER_TYPES] = {
}
if (res->target == PIPE_BUFFER) {
- for (i = 0; i < Elements(ilo->cbuf[sh].cso); i++) {
- struct ilo_cbuf_cso *cbuf = &ilo->cbuf[sh].cso[i];
+ for (i = 0; i < Elements(vec->cbuf[sh].cso); i++) {
+ struct ilo_cbuf_cso *cbuf = &vec->cbuf[sh].cso[i];
if (cbuf->resource == res) {
cbuf->surface.bo = bo;
}
}
- for (i = 0; i < ilo->resource.count; i++) {
+ for (i = 0; i < vec->resource.count; i++) {
struct ilo_surface_cso *cso =
- (struct ilo_surface_cso *) ilo->resource.states[i];
+ (struct ilo_surface_cso *) vec->resource.states[i];
if (cso->base.texture == res) {
cso->u.rt.bo = bo;
/* for now? */
if (res->target != PIPE_BUFFER) {
- for (i = 0; i < ilo->fb.state.nr_cbufs; i++) {
+ for (i = 0; i < vec->fb.state.nr_cbufs; i++) {
struct ilo_surface_cso *cso =
- (struct ilo_surface_cso *) ilo->fb.state.cbufs[i];
+ (struct ilo_surface_cso *) vec->fb.state.cbufs[i];
if (cso && cso->base.texture == res) {
cso->u.rt.bo = bo;
states |= ILO_DIRTY_FB;
}
}
- if (ilo->fb.state.zsbuf && ilo->fb.state.zsbuf->texture == res) {
+ if (vec->fb.state.zsbuf && vec->fb.state.zsbuf->texture == res) {
struct ilo_surface_cso *cso =
- (struct ilo_surface_cso *) ilo->fb.state.zsbuf;
+ (struct ilo_surface_cso *) vec->fb.state.zsbuf;
cso->u.rt.bo = bo;
states |= ILO_DIRTY_FB;
}
}
- for (i = 0; i < ilo->cs_resource.count; i++) {
+ for (i = 0; i < vec->cs_resource.count; i++) {
struct ilo_surface_cso *cso =
- (struct ilo_surface_cso *) ilo->cs_resource.states[i];
+ (struct ilo_surface_cso *) vec->cs_resource.states[i];
if (cso->base.texture == res) {
cso->u.rt.bo = bo;
states |= ILO_DIRTY_CS_RESOURCE;
}
}
- for (i = 0; i < ilo->global_binding.count; i++) {
- if (ilo->global_binding.resources[i] == res) {
+ for (i = 0; i < vec->global_binding.count; i++) {
+ if (vec->global_binding.resources[i] == res) {
states |= ILO_DIRTY_GLOBAL_BINDING;
break;
}
}
- ilo->dirty |= states;
+ vec->dirty |= states;
}
void
-ilo_dump_dirty_flags(uint32_t dirty)
+ilo_state_vector_dump_dirty(const struct ilo_state_vector *vec)
{
static const char *state_names[ILO_STATE_COUNT] = {
[ILO_STATE_VB] = "VB",
[ILO_STATE_CS_RESOURCE] = "CS_RESOURCE",
[ILO_STATE_GLOBAL_BINDING] = "GLOBAL_BINDING",
};
+ uint32_t dirty = vec->dirty;
if (!dirty) {
ilo_printf("no state is dirty\n");
#ifndef ILO_STATE_H
#define ILO_STATE_H
+#include "pipe/p_state.h"
+
#include "ilo_common.h"
/**
ILO_DIRTY_ALL = 0xffffffff,
};
-struct pipe_draw_info;
-struct pipe_resource;
-
+struct intel_bo;
struct ilo_buffer;
struct ilo_context;
struct ilo_shader_state;
uint32_t payload[5];
};
+struct ilo_state_vector {
+ const struct pipe_draw_info *draw;
+
+ uint32_t dirty;
+
+ struct ilo_vb_state vb;
+ const struct ilo_ve_state *ve;
+ struct ilo_ib_state ib;
+
+ struct ilo_shader_state *vs;
+ struct ilo_shader_state *gs;
+
+ struct ilo_so_state so;
+
+ struct pipe_clip_state clip;
+ struct ilo_viewport_state viewport;
+ struct ilo_scissor_state scissor;
+
+ const struct ilo_rasterizer_state *rasterizer;
+ struct pipe_poly_stipple poly_stipple;
+ unsigned sample_mask;
+
+ struct ilo_shader_state *fs;
+
+ const struct ilo_dsa_state *dsa;
+ struct pipe_stencil_ref stencil_ref;
+ const struct ilo_blend_state *blend;
+ struct pipe_blend_color blend_color;
+ struct ilo_fb_state fb;
+
+ /* shader resources */
+ struct ilo_sampler_state sampler[PIPE_SHADER_TYPES];
+ struct ilo_view_state view[PIPE_SHADER_TYPES];
+ struct ilo_cbuf_state cbuf[PIPE_SHADER_TYPES];
+ struct ilo_resource_state resource;
+
+ /* GPGPU */
+ struct ilo_shader_state *cs;
+ struct ilo_resource_state cs_resource;
+ struct ilo_global_binding global_binding;
+};
+
void
ilo_init_state_functions(struct ilo_context *ilo);
void
-ilo_init_states(struct ilo_context *ilo);
+ilo_finalize_3d_states(struct ilo_context *ilo,
+ const struct pipe_draw_info *draw);
void
-ilo_cleanup_states(struct ilo_context *ilo);
+ilo_state_vector_init(const struct ilo_dev_info *dev,
+ struct ilo_state_vector *vec);
void
-ilo_finalize_3d_states(struct ilo_context *ilo,
- const struct pipe_draw_info *draw);
+ilo_state_vector_cleanup(struct ilo_state_vector *vec);
void
-ilo_mark_states_with_resource_renamed(struct ilo_context *ilo,
- struct pipe_resource *res);
+ilo_state_vector_resource_renamed(struct ilo_state_vector *vec,
+ struct pipe_resource *res);
void
-ilo_dump_dirty_flags(uint32_t dirty);
+ilo_state_vector_dump_dirty(const struct ilo_state_vector *vec);
#endif /* ILO_STATE_H */
}
if (resource_renamed)
- ilo_mark_states_with_resource_renamed(ilo, res);
+ ilo_state_vector_resource_renamed(&ilo->state_vector, res);
}
return true;
if ((usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) &&
ilo_buffer_rename_bo(buf)) {
- ilo_mark_states_with_resource_renamed(ilo, &buf->base);
+ ilo_state_vector_resource_renamed(&ilo->state_vector, &buf->base);
unblocked = true;
}
else {
#include "toy_legalize.h"
#include "toy_optimize.h"
#include "toy_helpers.h"
-#include "ilo_context.h"
#include "ilo_shader_internal.h"
struct fs_compile_context {
#define ILO_SHADER_INTERNAL_H
#include "ilo_common.h"
-#include "ilo_context.h"
+#include "ilo_state.h"
#include "ilo_shader.h"
/* XXX The interface needs to be reworked */
void
ilo_shader_variant_init(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
- const struct ilo_context *ilo);
+ const struct ilo_state_vector *vec);
bool
ilo_shader_state_use_variant(struct ilo_shader_state *state,
#include "toy_legalize.h"
#include "toy_optimize.h"
#include "toy_helpers.h"
-#include "ilo_context.h"
#include "ilo_shader_internal.h"
struct vs_compile_context {
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