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i965: Fix up texture layout for small things with wide pitches (tiled)
author
Eric Anholt
<eric@anholt.net>
Thu, 18 Jun 2009 03:53:27 +0000
(20:53 -0700)
committer
Eric Anholt
<eric@anholt.net>
Thu, 18 Jun 2009 04:01:48 +0000
(21:01 -0700)
We were packing according to the pitch, while the hardware appears to base
it on the base level width.
With this and the previous commit, fbo-cubemap now matches untiled behavior.
src/mesa/drivers/dri/i965/brw_tex_layout.c
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diff --git
a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 5c5455813a4500b4f4ac5e1e6ee4b4fc5af8e432..67d8d96947ec54b007dba3f7c18b298888f3ae61 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/
src/mesa/drivers/dri/i965/brw_tex_layout.c
@@
-69,7
+69,7
@@
GLboolean brw_miptree_layout(struct intel_context *intel,
pack_y_pitch = ALIGN(mt->height0, align_h);
}
- pack_x_pitch =
mt->pitc
h;
+ pack_x_pitch =
widt
h;
pack_x_nr = 1;
for (level = mt->first_level ; level <= mt->last_level ; level++) {