r300: Fix dri1 not to emit state that is not supported in old drm.
authorPauli Nieminen <suokkos@gmail.com>
Fri, 21 Aug 2009 23:43:41 +0000 (02:43 +0300)
committerPauli Nieminen <suokkos@gmail.com>
Fri, 21 Aug 2009 23:54:34 +0000 (02:54 +0300)
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_ioctl.c

index 565c4b669f64ed5fa65f513d52c58f2cef89d757..b08af116a120c3f5a2ebb8f02f8981330f5ed287 100644 (file)
@@ -252,6 +252,9 @@ static int check_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
        uint32_t dw = 6 + 3 + 16;
        if (r300->radeon.radeonScreen->kernel_mm)
                dw += 2;
+       if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) {
+               dw -= 3 + 16;
+       }
        return dw;
 }
 
@@ -710,18 +713,22 @@ void r300InitCmdBuf(r300ContextPtr r300)
        /* VPU only on TCL */
        if (has_tcl) {
                int i;
-               ALLOC_STATE(vap_flush, always, 10, 0);
-               /* flush processing vertices */
-               r300->hw.vap_flush.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
-               r300->hw.vap_flush.cmd[1] = 0;
-               r300->hw.vap_flush.cmd[2] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DSTCACHE_CTLSTAT, 1);
-               r300->hw.vap_flush.cmd[3] = R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D;
-               r300->hw.vap_flush.cmd[4] = cmdpacket0(r300->radeon.radeonScreen, RADEON_WAIT_UNTIL, 1);
-               r300->hw.vap_flush.cmd[5] = RADEON_WAIT_3D_IDLECLEAN;
-               r300->hw.vap_flush.cmd[6] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
-               r300->hw.vap_flush.cmd[7] = 0xffffff;
-               r300->hw.vap_flush.cmd[8] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_STATE_FLUSH_REG, 1);
-               r300->hw.vap_flush.cmd[9] = 0;
+               if (r300->radeon.radeonScreen->kernel_mm) {
+                       ALLOC_STATE(vap_flush, always, 10, 0);
+                       /* flush processing vertices */
+                       r300->hw.vap_flush.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
+                       r300->hw.vap_flush.cmd[1] = 0;
+                       r300->hw.vap_flush.cmd[2] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DSTCACHE_CTLSTAT, 1);
+                       r300->hw.vap_flush.cmd[3] = R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D;
+                       r300->hw.vap_flush.cmd[4] = cmdpacket0(r300->radeon.radeonScreen, RADEON_WAIT_UNTIL, 1);
+                       r300->hw.vap_flush.cmd[5] = RADEON_WAIT_3D_IDLECLEAN;
+                       r300->hw.vap_flush.cmd[6] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
+                       r300->hw.vap_flush.cmd[7] = 0xffffff;
+                       r300->hw.vap_flush.cmd[8] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_STATE_FLUSH_REG, 1);
+                       r300->hw.vap_flush.cmd[9] = 0;
+               } else {
+                       ALLOC_STATE(vap_flush, never, 10, 0);
+               }
 
 
                ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0);
index bc33b607cff14761422c216d93be77a5b15a3b78..3303078e39abfd455f4592c4347412cb4d240871 100644 (file)
@@ -507,7 +507,15 @@ static void r300EmitClearState(GLcontext * ctx)
                        R500_ALU_RGBA_A_SWIZ_0;
 
                r500fp.cmd[7] = 0;
-               emit_r500fp(ctx, &r500fp);
+               if (r300->radeon.radeonScreen->kernel_mm) {
+                       emit_r500fp(ctx, &r500fp);
+               } else {
+                       int dwords = r500fp.check(ctx,&r500fp);
+                       BEGIN_BATCH_NO_AUTOSTATE(dwords);
+                       OUT_BATCH_TABLE(r500fp.cmd, dwords);
+                       END_BATCH();
+               }
+
        }
 
        BEGIN_BATCH(2);
@@ -593,14 +601,19 @@ static void r300EmitClearState(GLcontext * ctx)
                                       PVS_SRC_REG_INPUT, NEGATE_NONE);
                vpu.cmd[8] = 0x0;
 
-               {
+               if (r300->radeon.radeonScreen->kernel_mm) {
                        int dwords = r300->hw.vap_flush.check(ctx,&r300->hw.vap_flush);
                        BEGIN_BATCH_NO_AUTOSTATE(dwords);
                        OUT_BATCH_TABLE(r300->hw.vap_flush.cmd, dwords);
                        END_BATCH();
+                       emit_vpu(ctx, &vpu);
+               } else {
+                       int dwords = vpu.check(ctx,&vpu);
+                       BEGIN_BATCH_NO_AUTOSTATE(dwords);
+                       OUT_BATCH_TABLE(vpu.cmd, dwords);
+                       END_BATCH();
                }
 
-               emit_vpu(ctx, &vpu);
        }
 }