alpha.md (addsi3, subsi3): No new temporaries once cse is no longer expected.

        * alpha.md (addsi3, subsi3): No new temporaries once cse is
        no longer expected.

From-SVN: r23537

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f851757cb8b0a87cfbf4a4054d8be8eb7d7f0ab3..818cff05da8a8521f8cddf9c5ea433bc7212709b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Thu Nov  5 04:03:06 1998  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (addsi3, subsi3): No new temporaries once cse is
+       no longer expected.
+
 Thu Nov  5 03:29:19 1998  Richard Henderson  <rth@cygnus.com>
 
        * alpha.md (addsi3, subsi3): Expand to a DImode temporary so as

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index c88497e3b358fefaa583bc6d63dedc2331da2ff5..8ae03e6fcd3b9979bb95c33d0bf567e3cb0a6b80 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -427,10 +427,17 @@
   ""
   "
 {
-  rtx tmp = gen_reg_rtx (DImode);
-  emit_insn (gen_adddi3 (tmp, gen_lowpart (DImode, operands[1]),
-                        gen_lowpart (DImode, operands[2])));
-  emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+  rtx op1 = gen_lowpart (DImode, operands[1]);
+  rtx op2 = gen_lowpart (DImode, operands[2]);
+
+  if (! cse_not_expected)
+    {
+      rtx tmp = gen_reg_rtx (DImode);
+      emit_insn (gen_adddi3 (tmp, op1, op2));
+      emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+    }
+  else
+    emit_insn (gen_adddi3 (gen_lowpart (DImode, operands[0]), op1, op2));
   DONE;
 } ")
 
@@ -714,10 +721,17 @@
   ""
   "
 {
-  rtx tmp = gen_reg_rtx (DImode);
-  emit_insn (gen_subdi3 (tmp, gen_lowpart (DImode, operands[1]),
-                        gen_lowpart (DImode, operands[2])));
-  emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+  rtx op1 = gen_lowpart (DImode, operands[1]);
+  rtx op2 = gen_lowpart (DImode, operands[2]);
+
+  if (! cse_not_expected)
+    {
+      rtx tmp = gen_reg_rtx (DImode);
+      emit_insn (gen_subdi3 (tmp, op1, op2));
+      emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+    }
+  else
+    emit_insn (gen_subdi3 (gen_lowpart (DImode, operands[0]), op1, op2));
   DONE;
 } ")