/**
***************************************************************************************************
* @file ciaddrlib.cpp
-* @brief Contains the implementation for the CIAddrLib class.
+* @brief Contains the implementation for the CiAddrLib class.
***************************************************************************************************
*/
* AddrCIHwlInit
*
* @brief
-* Creates an CIAddrLib object.
+* Creates an CiAddrLib object.
*
* @return
-* Returns an CIAddrLib object pointer.
+* Returns an CiAddrLib object pointer.
***************************************************************************************************
*/
AddrLib* AddrCIHwlInit(const AddrClient* pClient)
{
- return CIAddrLib::CreateObj(pClient);
+ return CiAddrLib::CreateObj(pClient);
}
/**
***************************************************************************************************
-* CIAddrLib::CIAddrLib
+* CiAddrLib::CiAddrLib
*
* @brief
* Constructor
*
***************************************************************************************************
*/
-CIAddrLib::CIAddrLib(const AddrClient* pClient) :
- SIAddrLib(pClient),
+CiAddrLib::CiAddrLib(const AddrClient* pClient) :
+ SiAddrLib(pClient),
m_noOfMacroEntries(0),
m_allowNonDispThickModes(FALSE)
{
/**
***************************************************************************************************
-* CIAddrLib::~CIAddrLib
+* CiAddrLib::~CiAddrLib
*
* @brief
* Destructor
***************************************************************************************************
*/
-CIAddrLib::~CIAddrLib()
+CiAddrLib::~CiAddrLib()
{
}
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeDccInfo
+* CiAddrLib::HwlComputeDccInfo
*
* @brief
* Compute DCC key size, base alignment
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE CIAddrLib::HwlComputeDccInfo(
+ADDR_E_RETURNCODE CiAddrLib::HwlComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
{
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeCmaskAddrFromCoord
+* CiAddrLib::HwlComputeCmaskAddrFromCoord
*
* @brief
* Compute tc compatible Cmask address from fmask ram address
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE CIAddrLib::HwlComputeCmaskAddrFromCoord(
+ADDR_E_RETURNCODE CiAddrLib::HwlComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] fmask addr/bpp/tile input
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] cmask address
) const
}
/**
***************************************************************************************************
-* CIAddrLib::HwlConvertChipFamily
+* CiAddrLib::HwlConvertChipFamily
*
* @brief
* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision
* AddrChipFamily
***************************************************************************************************
*/
-AddrChipFamily CIAddrLib::HwlConvertChipFamily(
+AddrChipFamily CiAddrLib::HwlConvertChipFamily(
UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h
UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h
{
/**
***************************************************************************************************
-* CIAddrLib::HwlInitGlobalParams
+* CiAddrLib::HwlInitGlobalParams
*
* @brief
* Initializes global parameters
*
***************************************************************************************************
*/
-BOOL_32 CIAddrLib::HwlInitGlobalParams(
+BOOL_32 CiAddrLib::HwlInitGlobalParams(
const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input
{
BOOL_32 valid = TRUE;
/**
***************************************************************************************************
-* CIAddrLib::HwlPostCheckTileIndex
+* CiAddrLib::HwlPostCheckTileIndex
*
* @brief
* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches
* Tile index.
***************************************************************************************************
*/
-INT_32 CIAddrLib::HwlPostCheckTileIndex(
+INT_32 CiAddrLib::HwlPostCheckTileIndex(
const ADDR_TILEINFO* pInfo, ///< [in] Tile Info
AddrTileMode mode, ///< [in] Tile mode
AddrTileType type, ///< [in] Tile type
/**
***************************************************************************************************
-* CIAddrLib::HwlSetupTileCfg
+* CiAddrLib::HwlSetupTileCfg
*
* @brief
* Map tile index to tile setting.
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE CIAddrLib::HwlSetupTileCfg(
+ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg(
INT_32 index, ///< [in] Tile index
INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI)
ADDR_TILEINFO* pInfo, ///< [out] Tile Info
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeSurfaceInfo
+* CiAddrLib::HwlComputeSurfaceInfo
*
* @brief
* Entry of ci's ComputeSurfaceInfo
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE CIAddrLib::HwlComputeSurfaceInfo(
+ADDR_E_RETURNCODE CiAddrLib::HwlComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure
) const
pOut->macroModeIndex = TileIndexInvalid;
}
- ADDR_E_RETURNCODE retCode = SIAddrLib::HwlComputeSurfaceInfo(pIn,pOut);
+ ADDR_E_RETURNCODE retCode = SiAddrLib::HwlComputeSurfaceInfo(pIn,pOut);
if (pOut->macroModeIndex == TileIndexNoMacroIndex)
{
/**
***************************************************************************************************
-* CIAddrLib::HwlFmaskSurfaceInfo
+* CiAddrLib::HwlFmaskSurfaceInfo
* @brief
* Entry of r800's ComputeFmaskInfo
* @return
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE CIAddrLib::HwlComputeFmaskInfo(
+ADDR_E_RETURNCODE CiAddrLib::HwlComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure
)
/**
***************************************************************************************************
-* CIAddrLib::HwlFmaskPreThunkSurfInfo
+* CiAddrLib::HwlFmaskPreThunkSurfInfo
*
* @brief
* Some preparation before thunking a ComputeSurfaceInfo call for Fmask
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-VOID CIAddrLib::HwlFmaskPreThunkSurfInfo(
+VOID CiAddrLib::HwlFmaskPreThunkSurfInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info
const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info
ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info
/**
***************************************************************************************************
-* CIAddrLib::HwlFmaskPostThunkSurfInfo
+* CiAddrLib::HwlFmaskPostThunkSurfInfo
*
* @brief
* Copy hwl extra field after calling thunked ComputeSurfaceInfo
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-VOID CIAddrLib::HwlFmaskPostThunkSurfInfo(
+VOID CiAddrLib::HwlFmaskPostThunkSurfInfo(
const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info
) const
/**
***************************************************************************************************
-* CIAddrLib::HwlDegradeThickTileMode
+* CiAddrLib::HwlDegradeThickTileMode
*
* @brief
* Degrades valid tile mode for thick modes if needed
* Suitable tile mode
***************************************************************************************************
*/
-AddrTileMode CIAddrLib::HwlDegradeThickTileMode(
+AddrTileMode CiAddrLib::HwlDegradeThickTileMode(
AddrTileMode baseTileMode, ///< [in] base tile mode
UINT_32 numSlices, ///< [in] current number of slices
UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice
/**
***************************************************************************************************
-* CIAddrLib::HwlOverrideTileMode
+* CiAddrLib::HwlOverrideTileMode
*
* @brief
* Override THICK to THIN, for specific formats on CI
*
***************************************************************************************************
*/
-BOOL_32 CIAddrLib::HwlOverrideTileMode(
+BOOL_32 CiAddrLib::HwlOverrideTileMode(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode
AddrTileType* pTileType ///< [in/out] pointer to the tile type
* Return the threshold of switching to P4_* instead of P16_* for PRT resources
***************************************************************************************************
*/
-UINT_32 CIAddrLib::GetPrtSwitchP4Threshold() const
+UINT_32 CiAddrLib::GetPrtSwitchP4Threshold() const
{
UINT_32 threshold;
/**
***************************************************************************************************
-* CIAddrLib::HwlSetupTileInfo
+* CiAddrLib::HwlSetupTileInfo
*
* @brief
* Setup default value of tile info for SI
***************************************************************************************************
*/
-VOID CIAddrLib::HwlSetupTileInfo(
+VOID CiAddrLib::HwlSetupTileInfo(
AddrTileMode tileMode, ///< [in] Tile mode
ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags
UINT_32 bpp, ///< [in] Bits per pixel
/**
***************************************************************************************************
-* CIAddrLib::ReadGbTileMode
+* CiAddrLib::ReadGbTileMode
*
* @brief
* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG.
* NA.
***************************************************************************************************
*/
-VOID CIAddrLib::ReadGbTileMode(
+VOID CiAddrLib::ReadGbTileMode(
UINT_32 regValue, ///< [in] GB_TILE_MODE register
ADDR_TILECONFIG* pCfg ///< [out] output structure
) const
/**
***************************************************************************************************
-* CIAddrLib::InitTileSettingTable
+* CiAddrLib::InitTileSettingTable
*
* @brief
* Initialize the ADDR_TILE_CONFIG table.
* TRUE if tile table is correctly initialized
***************************************************************************************************
*/
-BOOL_32 CIAddrLib::InitTileSettingTable(
+BOOL_32 CiAddrLib::InitTileSettingTable(
const UINT_32* pCfg, ///< [in] Pointer to table of tile configs
UINT_32 noOfEntries ///< [in] Numbe of entries in the table above
)
/**
***************************************************************************************************
-* CIAddrLib::ReadGbMacroTileCfg
+* CiAddrLib::ReadGbMacroTileCfg
*
* @brief
* Convert GB_MACRO_TILE_CFG HW value to ADDR_TILE_CONFIG.
* NA.
***************************************************************************************************
*/
-VOID CIAddrLib::ReadGbMacroTileCfg(
+VOID CiAddrLib::ReadGbMacroTileCfg(
UINT_32 regValue, ///< [in] GB_MACRO_TILE_MODE register
ADDR_TILEINFO* pCfg ///< [out] output structure
) const
/**
***************************************************************************************************
-* CIAddrLib::InitMacroTileCfgTable
+* CiAddrLib::InitMacroTileCfgTable
*
* @brief
* Initialize the ADDR_MACRO_TILE_CONFIG table.
* TRUE if macro tile table is correctly initialized
***************************************************************************************************
*/
-BOOL_32 CIAddrLib::InitMacroTileCfgTable(
+BOOL_32 CiAddrLib::InitMacroTileCfgTable(
const UINT_32* pCfg, ///< [in] Pointer to table of tile configs
UINT_32 noOfMacroEntries ///< [in] Numbe of entries in the table above
)
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeMacroModeIndex
+* CiAddrLib::HwlComputeMacroModeIndex
*
* @brief
* Computes macro tile mode index
* TRUE if macro tile table is correctly initialized
***************************************************************************************************
*/
-INT_32 CIAddrLib::HwlComputeMacroModeIndex(
+INT_32 CiAddrLib::HwlComputeMacroModeIndex(
INT_32 tileIndex, ///< [in] Tile mode index
ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags
UINT_32 bpp, ///< [in] Bit per pixel
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeTileDataWidthAndHeightLinear
+* CiAddrLib::HwlComputeTileDataWidthAndHeightLinear
*
* @brief
* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout
* MacroWidth and macroHeight are measured in pixels
***************************************************************************************************
*/
-VOID CIAddrLib::HwlComputeTileDataWidthAndHeightLinear(
+VOID CiAddrLib::HwlComputeTileDataWidthAndHeightLinear(
UINT_32* pMacroWidth, ///< [out] macro tile width
UINT_32* pMacroHeight, ///< [out] macro tile height
UINT_32 bpp, ///< [in] bits per pixel
/**
***************************************************************************************************
-* CIAddrLib::HwlStereoCheckRightOffsetPadding
+* CiAddrLib::HwlStereoCheckRightOffsetPadding
*
* @brief
* check if the height needs extra padding for stereo right eye offset, to avoid swizzling
* corruption observed. - EPR#374788
***************************************************************************************************
*/
-BOOL_32 CIAddrLib::HwlStereoCheckRightOffsetPadding() const
+BOOL_32 CiAddrLib::HwlStereoCheckRightOffsetPadding() const
{
BOOL_32 bNeedPadding = FALSE;
/**
***************************************************************************************************
-* CIAddrLib::HwlComputeMetadataNibbleAddress
+* CiAddrLib::HwlComputeMetadataNibbleAddress
*
* @brief
* calculate meta data address based on input information
*
***************************************************************************************************
*/
-UINT_64 CIAddrLib::HwlComputeMetadataNibbleAddress(
+UINT_64 CiAddrLib::HwlComputeMetadataNibbleAddress(
UINT_64 uncompressedDataByteAddress,
UINT_64 dataBaseByteAddress,
UINT_64 metadataBaseByteAddress,
/**
***************************************************************************************************
-* CIAddrLib::HwlPadDimensions
+* CiAddrLib::HwlPadDimensions
*
* @brief
* Helper function to pad dimensions
*
***************************************************************************************************
*/
-VOID CIAddrLib::HwlPadDimensions(
+VOID CiAddrLib::HwlPadDimensions(
AddrTileMode tileMode, ///< [in] tile mode
UINT_32 bpp, ///< [in] bits per pixel
ADDR_SURFACE_FLAGS flags, ///< [in] surface flags
/**
***************************************************************************************************
* @file siaddrlib.cpp
-* @brief Contains the implementation for the SIAddrLib class.
+* @brief Contains the implementation for the SiAddrLib class.
***************************************************************************************************
*/
* AddrSIHwlInit
*
* @brief
-* Creates an SIAddrLib object.
+* Creates an SiAddrLib object.
*
* @return
-* Returns an SIAddrLib object pointer.
+* Returns an SiAddrLib object pointer.
***************************************************************************************************
*/
AddrLib* AddrSIHwlInit(const AddrClient* pClient)
{
- return SIAddrLib::CreateObj(pClient);
+ return SiAddrLib::CreateObj(pClient);
}
/**
***************************************************************************************************
-* SIAddrLib::SIAddrLib
+* SiAddrLib::SiAddrLib
*
* @brief
* Constructor
*
***************************************************************************************************
*/
-SIAddrLib::SIAddrLib(const AddrClient* pClient) :
+SiAddrLib::SiAddrLib(const AddrClient* pClient) :
EgBasedAddrLib(pClient),
m_noOfEntries(0)
{
/**
***************************************************************************************************
-* SIAddrLib::~SIAddrLib
+* SiAddrLib::~SiAddrLib
*
* @brief
* Destructor
***************************************************************************************************
*/
-SIAddrLib::~SIAddrLib()
+SiAddrLib::~SiAddrLib()
{
}
/**
***************************************************************************************************
-* SIAddrLib::HwlGetPipes
+* SiAddrLib::HwlGetPipes
*
* @brief
* Get number pipes
* num pipes
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlGetPipes(
+UINT_32 SiAddrLib::HwlGetPipes(
const ADDR_TILEINFO* pTileInfo ///< [in] Tile info
) const
{
/**
***************************************************************************************************
-* SIAddrLib::GetPipePerSurf
+* SiAddrLib::GetPipePerSurf
* @brief
* get pipe num base on inputing tileinfo->pipeconfig
* @return
* pipe number
***************************************************************************************************
*/
-UINT_32 SIAddrLib::GetPipePerSurf(
+UINT_32 SiAddrLib::GetPipePerSurf(
AddrPipeCfg pipeConfig ///< [in] pipe config
) const
{
/**
***************************************************************************************************
-* SIAddrLib::ComputePipeFromCoord
+* SiAddrLib::ComputePipeFromCoord
*
* @brief
* Compute pipe number from coordinates
* Pipe number
***************************************************************************************************
*/
-UINT_32 SIAddrLib::ComputePipeFromCoord(
+UINT_32 SiAddrLib::ComputePipeFromCoord(
UINT_32 x, ///< [in] x coordinate
UINT_32 y, ///< [in] y coordinate
UINT_32 slice, ///< [in] slice index
/**
***************************************************************************************************
-* SIAddrLib::ComputeTileCoordFromPipeAndElemIdx
+* SiAddrLib::ComputeTileCoordFromPipeAndElemIdx
*
* @brief
* Compute (x,y) of a tile within a macro tile from address
* Pipe number
***************************************************************************************************
*/
-VOID SIAddrLib::ComputeTileCoordFromPipeAndElemIdx(
+VOID SiAddrLib::ComputeTileCoordFromPipeAndElemIdx(
UINT_32 elemIdx, ///< [in] per pipe element index within a macro tile
UINT_32 pipe, ///< [in] pipe index
AddrPipeCfg pipeCfg, ///< [in] pipe config
/**
***************************************************************************************************
-* SIAddrLib::TileCoordToMaskElementIndex
+* SiAddrLib::TileCoordToMaskElementIndex
*
* @brief
* Compute element index from coordinates in tiles
* Element index
***************************************************************************************************
*/
-UINT_32 SIAddrLib::TileCoordToMaskElementIndex(
+UINT_32 SiAddrLib::TileCoordToMaskElementIndex(
UINT_32 tx, ///< [in] x coord, in Tiles
UINT_32 ty, ///< [in] y coord, in Tiles
AddrPipeCfg pipeConfig, ///< [in] pipe config
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeTileDataWidthAndHeightLinear
+* SiAddrLib::HwlComputeTileDataWidthAndHeightLinear
*
* @brief
* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout
* MacroWidth and macroHeight are measured in pixels
***************************************************************************************************
*/
-VOID SIAddrLib::HwlComputeTileDataWidthAndHeightLinear(
+VOID SiAddrLib::HwlComputeTileDataWidthAndHeightLinear(
UINT_32* pMacroWidth, ///< [out] macro tile width
UINT_32* pMacroHeight, ///< [out] macro tile height
UINT_32 bpp, ///< [in] bits per pixel
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeHtileBytes
+* SiAddrLib::HwlComputeHtileBytes
*
* @brief
* Compute htile size in bytes
* Htile size in bytes
***************************************************************************************************
*/
-UINT_64 SIAddrLib::HwlComputeHtileBytes(
+UINT_64 SiAddrLib::HwlComputeHtileBytes(
UINT_32 pitch, ///< [in] pitch
UINT_32 height, ///< [in] height
UINT_32 bpp, ///< [in] bits per pixel
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeXmaskAddrFromCoord
+* SiAddrLib::HwlComputeXmaskAddrFromCoord
*
* @brief
* Compute address from coordinates for htile/cmask
* Byte address
***************************************************************************************************
*/
-UINT_64 SIAddrLib::HwlComputeXmaskAddrFromCoord(
+UINT_64 SiAddrLib::HwlComputeXmaskAddrFromCoord(
UINT_32 pitch, ///< [in] pitch
UINT_32 height, ///< [in] height
UINT_32 x, ///< [in] x coord
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeXmaskCoordFromAddr
+* SiAddrLib::HwlComputeXmaskCoordFromAddr
*
* @brief
* Compute the coord from an address of a cmask/htile
* This method is reused by htile, so rename to Xmask
***************************************************************************************************
*/
-VOID SIAddrLib::HwlComputeXmaskCoordFromAddr(
+VOID SiAddrLib::HwlComputeXmaskCoordFromAddr(
UINT_64 addr, ///< [in] address
UINT_32 bitPosition, ///< [in] bitPosition in a byte
UINT_32 pitch, ///< [in] pitch
/**
***************************************************************************************************
-* SIAddrLib::HwlGetPitchAlignmentLinear
+* SiAddrLib::HwlGetPitchAlignmentLinear
* @brief
* Get pitch alignment
* @return
* pitch alignment
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlGetPitchAlignmentLinear(
+UINT_32 SiAddrLib::HwlGetPitchAlignmentLinear(
UINT_32 bpp, ///< [in] bits per pixel
ADDR_SURFACE_FLAGS flags ///< [in] surface flags
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlGetSizeAdjustmentLinear
+* SiAddrLib::HwlGetSizeAdjustmentLinear
*
* @brief
* Adjust linear surface pitch and slice size
* Logical slice size in bytes
***************************************************************************************************
*/
-UINT_64 SIAddrLib::HwlGetSizeAdjustmentLinear(
+UINT_64 SiAddrLib::HwlGetSizeAdjustmentLinear(
AddrTileMode tileMode, ///< [in] tile mode
UINT_32 bpp, ///< [in] bits per pixel
UINT_32 numSamples, ///< [in] number of samples
/**
***************************************************************************************************
-* SIAddrLib::HwlPreHandleBaseLvl3xPitch
+* SiAddrLib::HwlPreHandleBaseLvl3xPitch
*
* @brief
* Pre-handler of 3x pitch (96 bit) adjustment
* Expected pitch
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlPreHandleBaseLvl3xPitch(
+UINT_32 SiAddrLib::HwlPreHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input
UINT_32 expPitch ///< [in] pitch
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlPostHandleBaseLvl3xPitch
+* SiAddrLib::HwlPostHandleBaseLvl3xPitch
*
* @brief
* Post-handler of 3x pitch adjustment
* Expected pitch
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlPostHandleBaseLvl3xPitch(
+UINT_32 SiAddrLib::HwlPostHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input
UINT_32 expPitch ///< [in] pitch
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlGetPitchAlignmentMicroTiled
+* SiAddrLib::HwlGetPitchAlignmentMicroTiled
*
* @brief
* Compute 1D tiled surface pitch alignment
* pitch alignment
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlGetPitchAlignmentMicroTiled(
+UINT_32 SiAddrLib::HwlGetPitchAlignmentMicroTiled(
AddrTileMode tileMode, ///< [in] tile mode
UINT_32 bpp, ///< [in] bits per pixel
ADDR_SURFACE_FLAGS flags, ///< [in] surface flags
/**
***************************************************************************************************
-* SIAddrLib::HwlGetSizeAdjustmentMicroTiled
+* SiAddrLib::HwlGetSizeAdjustmentMicroTiled
*
* @brief
* Adjust 1D tiled surface pitch and slice size
* Logical slice size in bytes
***************************************************************************************************
*/
-UINT_64 SIAddrLib::HwlGetSizeAdjustmentMicroTiled(
+UINT_64 SiAddrLib::HwlGetSizeAdjustmentMicroTiled(
UINT_32 thickness, ///< [in] thickness
UINT_32 bpp, ///< [in] bits per pixel
ADDR_SURFACE_FLAGS flags, ///< [in] surface flags
/**
***************************************************************************************************
-* SIAddrLib::HwlConvertChipFamily
+* SiAddrLib::HwlConvertChipFamily
*
* @brief
* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision
* AddrChipFamily
***************************************************************************************************
*/
-AddrChipFamily SIAddrLib::HwlConvertChipFamily(
+AddrChipFamily SiAddrLib::HwlConvertChipFamily(
UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h
UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h
{
/**
***************************************************************************************************
-* SIAddrLib::HwlSetupTileInfo
+* SiAddrLib::HwlSetupTileInfo
*
* @brief
* Setup default value of tile info for SI
***************************************************************************************************
*/
-VOID SIAddrLib::HwlSetupTileInfo(
+VOID SiAddrLib::HwlSetupTileInfo(
AddrTileMode tileMode, ///< [in] Tile mode
ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags
UINT_32 bpp, ///< [in] Bits per pixel
/**
***************************************************************************************************
-* SIAddrLib::DecodeGbRegs
+* SiAddrLib::DecodeGbRegs
*
* @brief
* Decodes GB_ADDR_CONFIG and noOfBanks/noOfRanks
*
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::DecodeGbRegs(
+BOOL_32 SiAddrLib::DecodeGbRegs(
const ADDR_REGISTER_VALUE* pRegValue) ///< [in] create input
{
GB_ADDR_CONFIG reg;
/**
***************************************************************************************************
-* SIAddrLib::HwlInitGlobalParams
+* SiAddrLib::HwlInitGlobalParams
*
* @brief
* Initializes global parameters
*
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::HwlInitGlobalParams(
+BOOL_32 SiAddrLib::HwlInitGlobalParams(
const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input
{
BOOL_32 valid = TRUE;
/**
***************************************************************************************************
-* SIAddrLib::HwlConvertTileInfoToHW
+* SiAddrLib::HwlConvertTileInfoToHW
* @brief
* Entry of si's ConvertTileInfoToHW
* @return
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE SIAddrLib::HwlConvertTileInfoToHW(
+ADDR_E_RETURNCODE SiAddrLib::HwlConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe
+* SiAddrLib::HwlComputeXmaskCoordYFrom8Pipe
*
* @brief
* Compute the Y coord which will be added to Xmask Y
* Y coord
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe(
+UINT_32 SiAddrLib::HwlComputeXmaskCoordYFrom8Pipe(
UINT_32 pipe, ///< [in] pipe id
UINT_32 x ///< [in] tile coord x, which is original x coord / 8
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe
+* SiAddrLib::HwlComputeSurfaceCoord2DFromBankPipe
*
* @brief
* Compute surface x,y coordinates from bank/pipe info
* N/A
***************************************************************************************************
*/
-VOID SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe(
+VOID SiAddrLib::HwlComputeSurfaceCoord2DFromBankPipe(
AddrTileMode tileMode, ///< [in] tile mode
UINT_32* pX, ///< [in/out] x coordinate
UINT_32* pY, ///< [in/out] y coordinate
/**
***************************************************************************************************
-* SIAddrLib::HwlPreAdjustBank
+* SiAddrLib::HwlPreAdjustBank
*
* @brief
* Adjust bank before calculating address acoording to bank/pipe
* Adjusted bank
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlPreAdjustBank(
+UINT_32 SiAddrLib::HwlPreAdjustBank(
UINT_32 tileX, ///< [in] x coordinate in unit of tile
UINT_32 bank, ///< [in] bank
ADDR_TILEINFO* pTileInfo ///< [in] tile info
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeSurfaceInfo
+* SiAddrLib::HwlComputeSurfaceInfo
*
* @brief
* Entry of si's ComputeSurfaceInfo
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE SIAddrLib::HwlComputeSurfaceInfo(
+ADDR_E_RETURNCODE SiAddrLib::HwlComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeMipLevel
+* SiAddrLib::HwlComputeMipLevel
* @brief
* Compute MipLevel info (including level 0)
* @return
* TRUE if HWL's handled
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::HwlComputeMipLevel(
+BOOL_32 SiAddrLib::HwlComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in/out] Input structure
) const
{
/**
***************************************************************************************************
-* SIAddrLib::HwlCheckLastMacroTiledLvl
+* SiAddrLib::HwlCheckLastMacroTiledLvl
*
* @brief
* Sets pOut->last2DLevel to TRUE if it is
*
***************************************************************************************************
*/
-VOID SIAddrLib::HwlCheckLastMacroTiledLvl(
+VOID SiAddrLib::HwlCheckLastMacroTiledLvl(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in/out] Output structure (used as input, too)
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlDegradeThickTileMode
+* SiAddrLib::HwlDegradeThickTileMode
*
* @brief
* Degrades valid tile mode for thick modes if needed
* Suitable tile mode
***************************************************************************************************
*/
-AddrTileMode SIAddrLib::HwlDegradeThickTileMode(
+AddrTileMode SiAddrLib::HwlDegradeThickTileMode(
AddrTileMode baseTileMode, ///< [in] base tile mode
UINT_32 numSlices, ///< [in] current number of slices
UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice
/**
***************************************************************************************************
-* SIAddrLib::HwlTileInfoEqual
+* SiAddrLib::HwlTileInfoEqual
*
* @brief
* Return TRUE if all field are equal
* Only takes care of current HWL's data
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::HwlTileInfoEqual(
+BOOL_32 SiAddrLib::HwlTileInfoEqual(
const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand
const ADDR_TILEINFO* pRight ///<[in] Right compare operand
) const
/**
***************************************************************************************************
-* SIAddrLib::GetTileSettings
+* SiAddrLib::GetTileSettings
*
* @brief
* Get tile setting infos by index.
* Tile setting info.
***************************************************************************************************
*/
-const ADDR_TILECONFIG* SIAddrLib::GetTileSetting(
+const ADDR_TILECONFIG* SiAddrLib::GetTileSetting(
UINT_32 index ///< [in] Tile index
) const
{
/**
***************************************************************************************************
-* SIAddrLib::HwlPostCheckTileIndex
+* SiAddrLib::HwlPostCheckTileIndex
*
* @brief
* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches
* Tile index.
***************************************************************************************************
*/
-INT_32 SIAddrLib::HwlPostCheckTileIndex(
+INT_32 SiAddrLib::HwlPostCheckTileIndex(
const ADDR_TILEINFO* pInfo, ///< [in] Tile Info
AddrTileMode mode, ///< [in] Tile mode
AddrTileType type, ///< [in] Tile type
/**
***************************************************************************************************
-* SIAddrLib::HwlSetupTileCfg
+* SiAddrLib::HwlSetupTileCfg
*
* @brief
* Map tile index to tile setting.
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-ADDR_E_RETURNCODE SIAddrLib::HwlSetupTileCfg(
+ADDR_E_RETURNCODE SiAddrLib::HwlSetupTileCfg(
INT_32 index, ///< [in] Tile index
INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI)
ADDR_TILEINFO* pInfo, ///< [out] Tile Info
/**
***************************************************************************************************
-* SIAddrLib::ReadGbTileMode
+* SiAddrLib::ReadGbTileMode
*
* @brief
* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG.
* NA.
***************************************************************************************************
*/
-VOID SIAddrLib::ReadGbTileMode(
+VOID SiAddrLib::ReadGbTileMode(
UINT_32 regValue, ///< [in] GB_TILE_MODE register
ADDR_TILECONFIG* pCfg ///< [out] output structure
) const
/**
***************************************************************************************************
-* SIAddrLib::InitTileSettingTable
+* SiAddrLib::InitTileSettingTable
*
* @brief
* Initialize the ADDR_TILE_CONFIG table.
* TRUE if tile table is correctly initialized
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::InitTileSettingTable(
+BOOL_32 SiAddrLib::InitTileSettingTable(
const UINT_32* pCfg, ///< [in] Pointer to table of tile configs
UINT_32 noOfEntries ///< [in] Numbe of entries in the table above
)
/**
***************************************************************************************************
-* SIAddrLib::HwlGetTileIndex
+* SiAddrLib::HwlGetTileIndex
*
* @brief
* Return the virtual/real index for given mode/type/info
* ADDR_OK if successful.
***************************************************************************************************
*/
-ADDR_E_RETURNCODE SIAddrLib::HwlGetTileIndex(
+ADDR_E_RETURNCODE SiAddrLib::HwlGetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut) const
{
/**
***************************************************************************************************
-* SIAddrLib::HwlFmaskPreThunkSurfInfo
+* SiAddrLib::HwlFmaskPreThunkSurfInfo
*
* @brief
* Some preparation before thunking a ComputeSurfaceInfo call for Fmask
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-VOID SIAddrLib::HwlFmaskPreThunkSurfInfo(
+VOID SiAddrLib::HwlFmaskPreThunkSurfInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info
const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info
ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info
/**
***************************************************************************************************
-* SIAddrLib::HwlFmaskPostThunkSurfInfo
+* SiAddrLib::HwlFmaskPostThunkSurfInfo
*
* @brief
* Copy hwl extra field after calling thunked ComputeSurfaceInfo
* ADDR_E_RETURNCODE
***************************************************************************************************
*/
-VOID SIAddrLib::HwlFmaskPostThunkSurfInfo(
+VOID SiAddrLib::HwlFmaskPostThunkSurfInfo(
const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlComputeFmaskBits
+* SiAddrLib::HwlComputeFmaskBits
* @brief
* Computes fmask bits
* @return
* Fmask bits
***************************************************************************************************
*/
-UINT_32 SIAddrLib::HwlComputeFmaskBits(
+UINT_32 SiAddrLib::HwlComputeFmaskBits(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
UINT_32* pNumSamples
) const
/**
***************************************************************************************************
-* SIAddrLib::HwlOverrideTileMode
+* SiAddrLib::HwlOverrideTileMode
*
* @brief
* Override tile modes (for PRT only, avoid client passes in an invalid PRT mode for SI.
*
***************************************************************************************************
*/
-BOOL_32 SIAddrLib::HwlOverrideTileMode(
+BOOL_32 SiAddrLib::HwlOverrideTileMode(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode
AddrTileType* pTileType ///< [in/out] pointer to the tile type
projects / mesa.git / commitdiff