a5xx: fix condition for updating *_FS_OUTPUT_CNTL
authorIlia Mirkin <imirkin@alum.mit.edu>
Sun, 9 Jul 2017 22:06:25 +0000 (18:06 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Sun, 9 Jul 2017 22:36:13 +0000 (18:36 -0400)
The register values depend on the currently set program, so make sure to
revalidate when the program changes.

Fixes glsl-1.10-fragdepth as well as
dEQP-GLES3.functional.shaders.fragdepth.compare.*

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@gmail.com>
src/gallium/drivers/freedreno/a5xx/fd5_emit.c

index 378ee2443b66d09c307064482dcdc31fc0a7c878..eeddef52ae31a925b4e13a302d3a6ea18e0a5a59 100644 (file)
@@ -642,7 +642,7 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                                          A5XX_PC_PRIMITIVE_CNTL_PRIMITIVE_RESTART));
        }
 
-       if (dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER)) {
+       if (dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
                uint32_t posz_regid = ir3_find_output_regid(fp, FRAG_RESULT_DEPTH);
                unsigned nr = pfb->nr_cbufs;