initwires.insert(wire);
}
- for (int wire_types = 0; wire_types < 2; wire_types++) {
- pool<SigBit> ffbitsToErase;
- for (auto wire : module->wires()) {
- if (wire->name[0] == (wire_types ? '\\' : '$')) {
- next_wire:
- continue;
- }
-
- for (auto bit : sigmap(wire))
- if (!ffbits.count(bit)) {
- goto next_wire;
- }
-
- for (auto bit : sigmap(wire)) {
- ffbitsToErase.insert(bit);
- }
-
- initwires.insert(wire);
- }
- for (const auto &bit : ffbitsToErase) {
- ffbits.erase(bit);
- }
- }
+ for (int wire_types = 0; wire_types < 2; wire_types++)
+ {
+ pool<SigBit> ffbitsToErase;
+ for (auto wire : module->wires())
+ {
+ if (wire->name[0] == (wire_types ? '\\' : '$')) {
+ next_wire:
+ continue;
+ }
+
+ for (auto bit : sigmap(wire))
+ if (!ffbits.count(bit)) {
+ goto next_wire;
+ }
+
+ for (auto bit : sigmap(wire)) {
+ ffbitsToErase.insert(bit);
+ }
+
+ initwires.insert(wire);
+ }
+ for (const auto & bit : ffbitsToErase) {
+ ffbits.erase(bit);
+ }
+ }
for (auto wire : initwires)
{