radeonsi: fix incorrect hw screen offset and guardband computation

It resulted in assertion failures or incorrect rendering.

Broken by: 9e182b8313c5ab952498a76495f57e8420f9e5ad

diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c
index 587422e50cacfbe98bceac375a60bc61b0c01b7f..b7fcd5bdb8282e5f24e054e856ef430a7bf4e4e9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_viewport.c
+++ b/src/gallium/drivers/radeonsi/si_state_viewport.c
@@ -176,8 +176,8 @@ static void si_emit_guardband(struct si_context *ctx)
        /* Determine the optimal hardware screen offset to center the viewport
         * within the viewport range in order to maximize the guardband size.
         */
-       int hw_screen_offset_x = (vp_as_scissor.maxx - vp_as_scissor.minx) / 2;
-       int hw_screen_offset_y = (vp_as_scissor.maxy - vp_as_scissor.miny) / 2;
+       int hw_screen_offset_x = (vp_as_scissor.maxx + vp_as_scissor.minx) / 2;
+       int hw_screen_offset_y = (vp_as_scissor.maxy + vp_as_scissor.miny) / 2;
 
        const unsigned hw_screen_offset_max = 8176;
        /* SI-CI need to align the offset to an ubertile consisting of all SEs. */