compat.genlib.resetsync: add shim for AsyncResetSynchronizer.
authorwhitequark <whitequark@whitequark.org>
Sat, 26 Jan 2019 18:24:12 +0000 (18:24 +0000)
committerwhitequark <whitequark@whitequark.org>
Sat, 26 Jan 2019 18:24:36 +0000 (18:24 +0000)
doc/COMPAT_SUMMARY.md
nmigen/compat/genlib/resetsync.py [new file with mode: 0644]

index 0b2eb4a5e70ec61c99747627ecf74f79075093ae..8b1ed537fab4b0a01244795240420b8a1f02bf31 100644 (file)
@@ -173,8 +173,8 @@ Compatibility summary
       - (−) `layout_get` **brk**
       - (−) `layout_partial` **brk**
       - (−) `Record` id
-    - () `resetsync` ?
-      - (−) `AsyncResetSynchronizer` ?
+    - (+) `resetsync` ?
+      - (+) `AsyncResetSynchronizer` **obs** → `.lib.cdc.ResetSynchronizer`
     - (−) `roundrobin` ?
       - (−) `SP_WITHDRAW`/`SP_CE` ?
       - (−) `RoundRobin` ?
diff --git a/nmigen/compat/genlib/resetsync.py b/nmigen/compat/genlib/resetsync.py
new file mode 100644 (file)
index 0000000..218dc8a
--- /dev/null
@@ -0,0 +1,16 @@
+from ...tools import deprecated
+from ...lib.cdc import ResetSynchronizer as NativeResetSynchronizer
+
+
+__all__ = ["AsyncResetSynchronizer"]
+
+
+@deprecated("instead of `migen.genlib.resetsync.AsyncResetSynchronizer`, "
+            "use `nmigen.lib.cdc.ResetSynchronizer`; note that ResetSynchronizer accepts "
+            "a clock domain name as an argument, not a clock domain object")
+class CompatResetSynchronizer(NativeResetSynchronizer):
+    def __init__(self, cd, async_reset):
+        super().__init__(async_reset, cd.name)
+
+
+AsyncResetSynchronizer = CompatResetSynchronizer